drm/amd/display: rename variable eanble -> enable

There is a spelling mistake in the variable name eanble,
rename it to enable.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
index 31b698b..8aa937f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
@@ -606,11 +606,11 @@ static void dce_mi_allocate_dmif(
        }
 
        if (dce_mi->wa.single_head_rdreq_dmif_limit) {
-               uint32_t eanble =  (total_stream_num > 1) ? 0 :
+               uint32_t enable =  (total_stream_num > 1) ? 0 :
                                dce_mi->wa.single_head_rdreq_dmif_limit;
 
                REG_UPDATE(MC_HUB_RDREQ_DMIF_LIMIT,
-                               ENABLE, eanble);
+                               ENABLE, enable);
        }
 }
 
@@ -636,11 +636,11 @@ static void dce_mi_free_dmif(
                        10, 3500);
 
        if (dce_mi->wa.single_head_rdreq_dmif_limit) {
-               uint32_t eanble =  (total_stream_num > 1) ? 0 :
+               uint32_t enable =  (total_stream_num > 1) ? 0 :
                                dce_mi->wa.single_head_rdreq_dmif_limit;
 
                REG_UPDATE(MC_HUB_RDREQ_DMIF_LIMIT,
-                               ENABLE, eanble);
+                               ENABLE, enable);
        }
 }