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drm/amd/display: Add interface to adjust DSC max target bpp limit
authorJoshua Aberback <joshua.aberback@amd.com>
Tue, 19 Nov 2019 23:46:26 +0000 (18:46 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 18 Dec 2019 21:09:07 +0000 (16:09 -0500)
[Why]
For some use cases we need to be able to adjust the maximum target bpp
allowed by DSC policy.

[How]
New interface dc_dsc_policy_set_max_target_bpp_limit

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc_dsc.h
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

index 8ec0981..7ece8eb 100644 (file)
@@ -77,4 +77,6 @@ bool dc_dsc_compute_config(
 void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,
                struct dc_dsc_policy *policy);
 
+void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit);
+
 #endif
index d2423ad..71b0483 100644 (file)
@@ -29,6 +29,9 @@
 
 /* This module's internal functions */
 
+/* default DSC policy target bitrate limit is 16bpp */
+static uint32_t dsc_policy_max_target_bpp_limit = 16;
+
 static uint32_t dc_dsc_bandwidth_in_kbps_from_timing(
        const struct dc_crtc_timing *timing)
 {
@@ -951,7 +954,12 @@ void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, struct dc
        default:
                return;
        }
-       /* internal upper limit to 16 bpp */
-       if (policy->max_target_bpp > 16)
-               policy->max_target_bpp = 16;
+       /* internal upper limit, default 16 bpp */
+       if (policy->max_target_bpp > dsc_policy_max_target_bpp_limit)
+               policy->max_target_bpp = dsc_policy_max_target_bpp_limit;
+}
+
+void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit)
+{
+       dsc_policy_max_target_bpp_limit = limit;
 }