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MIPS: Loongson: Merge load addresses
author谢致邦 (XIE Zhibang) <Yeking@Red54.com>
Wed, 4 Jan 2017 13:30:58 +0000 (21:30 +0800)
committerPaul Burton <paul.burton@mips.com>
Tue, 31 Jul 2018 01:59:01 +0000 (18:59 -0700)
Systems based upon the Loongson 1B & 1C CPUs share the same load
address, as do those based upon Loongson 1A. Unify the definition of
this load address to reduce duplication & avoid the need for an extra
Loongson 1A case in future.

[paul.burton@mips.com: Rewrite commit message.]

Signed-off-by: 谢致邦 (XIE Zhibang) <Yeking@Red54.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/14927/
Cc: linux-mips@linux-mips.org
arch/mips/loongson32/Platform

index 90ac8f3..a0dbb3b 100644 (file)
@@ -1,5 +1,4 @@
 cflags-$(CONFIG_CPU_LOONGSON1)         += -march=mips32 -Wa,--trap
 platform-$(CONFIG_MACH_LOONGSON32)     += loongson32/
 cflags-$(CONFIG_MACH_LOONGSON32)       += -I$(srctree)/arch/mips/include/asm/mach-loongson32
-load-$(CONFIG_LOONGSON1_LS1B)          += 0xffffffff80100000
-load-$(CONFIG_LOONGSON1_LS1C)          += 0xffffffff80100000
+load-$(CONFIG_CPU_LOONGSON1)           += 0xffffffff80100000