clk: renesas: r8a7796: Add Sound DVC clocks

This patch adds adds SCU(DVC{0,1}) clocks for R8A7796 SoC.

Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 5d65a41..63c664f 100644 (file)
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -220,6 +220,8 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
        DEF_MOD("ssi1",                 1014,   MOD_CLK_ID(1005)),
        DEF_MOD("ssi0",                 1015,   MOD_CLK_ID(1005)),
        DEF_MOD("scu-all",              1017,   R8A7796_CLK_S3D4),
+       DEF_MOD("scu-dvc1",             1018,   MOD_CLK_ID(1017)),
+       DEF_MOD("scu-dvc0",             1019,   MOD_CLK_ID(1017)),
        DEF_MOD("scu-ctu1-mix1",        1020,   MOD_CLK_ID(1017)),
        DEF_MOD("scu-ctu0-mix0",        1021,   MOD_CLK_ID(1017)),
        DEF_MOD("scu-src9",             1022,   MOD_CLK_ID(1017)),