}
enum{ADDRESS_CPU_OPEN, ADDRESS_CPU_CLOSE};
-static inline void address_set(long address, int cpu_open)
+static inline void address_set(long address)
{
long address_h = address >> 8;
long address_l = address & 0xff;
- if(cpu_open == ADDRESS_CPU_OPEN){
- //hongkong ¤Î¥Ç¡¼¥¿Ç˲õ¤Ç A7toA0 ¤òÀè¤ËÀßÄê¤Ç¤¤Ê¤¤
- data_port_latch(DATA_SELECT_A15toA8, address_h);
- data_port_latch(DATA_SELECT_A7toA0, address_l);
- }else{
- data_port_latch(DATA_SELECT_A15toA8, address_h);
- data_port_latch(DATA_SELECT_A7toA0, address_l);
- }
+ data_port_latch(DATA_SELECT_A15toA8, address_h);
+ data_port_latch(DATA_SELECT_A7toA0, address_l);
}
static inline u8 data_port_get(long address, int bus)
{
- address_set(address, 0);
+ address_set(address);
port_control_write(DATA_SELECT_BREAK_DATA << BITNUM_CONTROL_DATA_SELECT, PORT_CONTROL_WRITE);
int s = DATA_SELECT_READ << BITNUM_CONTROL_DATA_SELECT;
s = bit_set(s, BITNUM_CONTROL_DATA_LATCH);
}
}
+static inline void cpu_romcs_set(long address)
+{
+ data_port_latch(DATA_SELECT_A15toA8, address >> 8);
+}
+
static void hk_cpu_6502_write(long address, long data, long wait_msec)
{
int c = BUS_CONTROL_BUS_STANDBY;
//Á´¤Æ¤Î¥Ð¥¹¤ò»ß¤á¤ë
data_port_latch(DATA_SELECT_CONTROL, c);
// /rom ¤ò H ¤Ë¤·¤Æ¥Ð¥¹¤ò»ß¤á¤ë
- address_set(address | ADDRESS_MASK_A15, ADDRESS_CPU_CLOSE);
+ address_set(address | ADDRESS_MASK_A15);
//¦Õ2 = L, R/W=L, address set, data set
c = bit_clear(c, BITNUM_CPU_M2);
data_port_set(c, data); //latch¤Ï¤³¤Î´Ø¿ôÆâÉô¤Ç¹Ô¤¦
if(address & ADDRESS_MASK_A15){
- //address_set(address & ADDRESS_MASK_A0toA14, ADDRESS_CPU_OPEN);
- data_port_latch(DATA_SELECT_A15toA8, (address & ADDRESS_MASK_A0toA14) >> 8);
+ cpu_romcs_set(address & ADDRESS_MASK_A0toA14);
}
c = bit_clear(c, BITNUM_CPU_RW);
data_port_latch(DATA_SELECT_CONTROL, c);
wait(wait_msec);
//¦Õ2 = H, R/W = H, address disable, data out disable
if(address & ADDRESS_MASK_A15){
- //address_set(address | ADDRESS_MASK_A15, ADDRESS_CPU_CLOSE);
- data_port_latch(DATA_SELECT_A15toA8, (address & ADDRESS_MASK_A15) >> 8);
+ //address & ADDRESS_MASK_A15 ¤ÇÆ°¤¤¤Æ¤¿..?
+ cpu_romcs_set(address | ADDRESS_MASK_A15);
}
data_port_latch(DATA_SELECT_CONTROL, BUS_CONTROL_BUS_STANDBY);
}
c = bit_clear(c, BITNUM_CPU_M2); //¤¿¤Ö¤ó¤¤¤ë
data_port_latch(DATA_SELECT_CONTROL, c);
//cpu rom ¤ò»ß¤á¤¿¥¢¥É¥ì¥¹¤òÅϤ¹
- address_set((address & ADDRESS_MASK_A0toA12) | ADDRESS_MASK_A15, ADDRESS_CPU_CLOSE);
+ address_set((address & ADDRESS_MASK_A0toA12) | ADDRESS_MASK_A15);
data_port_set(c, data);
c = bit_clear(c, BITNUM_WRITEDATA_OUTPUT);
//CS down
int c = FLASH_CPU_WRITE;
//Á´¤Æ¤Î¥Ð¥¹¤ò»ß¤á¤ë
data_port_latch(DATA_SELECT_CONTROL, c);
- address_set(address | ADDRESS_MASK_A15, ADDRESS_CPU_CLOSE);
+ address_set(address | ADDRESS_MASK_A15);
data_port_set(c, data);
/*
W29C020
*/
c = bit_clear(c, BITNUM_WRITEDATA_OUTPUT);
//CS down
- data_port_latch(DATA_SELECT_A15toA8, (address & ADDRESS_MASK_A0toA14) >> 8);
+ cpu_romcs_set(address & ADDRESS_MASK_A0toA14);
//WE down
c = bit_clear(c, BITNUM_CPU_RW);
// c = bit_clear(c, BITNUM_CPU_M2);
//WE up
data_port_latch(DATA_SELECT_CONTROL, FLASH_CPU_WRITE);
//CS up
- address_set(address | ADDRESS_MASK_A15, ADDRESS_CPU_CLOSE);
+ cpu_romcs_set(address | ADDRESS_MASK_A15);
}
const struct reader_driver DRIVER_HONGKONGFC = {
break;
case 'c':
data_port_latch(DATA_SELECT_CONTROL, BUS_CONTROL_CPU_READ);
- address_set(d ^ ADDRESS_MASK_A15, ADDRESS_RESET);
+ address_set(d ^ ADDRESS_MASK_A15);
port_control_write(DATA_SELECT_BREAK_DATA << BITNUM_CONTROL_DATA_SELECT, PORT_CONTROL_WRITE);
port_control_write(DATA_SELECT_READ << BITNUM_CONTROL_DATA_SELECT, PORT_CONTROL_READ);
printf("%02x\n", _inp(PORT_DATA));