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Spelling correction
author
Joel Jones
<joel_k_jones@apple.com>
Sun, 10 Feb 2013 23:56:30 +0000
(23:56 +0000)
committer
Joel Jones
<joel_k_jones@apple.com>
Sun, 10 Feb 2013 23:56:30 +0000
(23:56 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174852
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/AArch64/AArch64ISelLowering.cpp
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diff --git
a/lib/Target/AArch64/AArch64ISelLowering.cpp
b/lib/Target/AArch64/AArch64ISelLowering.cpp
index
071b432
..
ff28dc1
100644
(file)
--- a/
lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/
lib/Target/AArch64/AArch64ISelLowering.cpp
@@
-2691,7
+2691,7
@@
static bool findEXTRHalf(SDValue N, SDValue &Src, uint32_t &ShiftAmount,
return true;
}
-/// EXTR instruc
it
on extracts a contiguous chunk of bits from two existing
+/// EXTR instruc
ti
on extracts a contiguous chunk of bits from two existing
/// registers viewed as a high/low pair. This function looks for the pattern:
/// (or (shl VAL1, #N), (srl VAL2, #RegWidth-N)) and replaces it with an
/// EXTR. Can't quite be done in TableGen because the two immediates aren't