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Add documentation for various aspects of the AMDGPU backend.
authorTony Tye <Tony.Tye@amd.com>
Wed, 7 Jun 2017 00:08:35 +0000 (00:08 +0000)
committerTony Tye <Tony.Tye@amd.com>
Wed, 7 Jun 2017 00:08:35 +0000 (00:08 +0000)
Remove extra tabs.
Builds sucessfully with Sphinx v1.5.5

Differential Revision: https://reviews.llvm.org/D33736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304848 91177308-0d34-0410-b5e6-96231b3b80d8

docs/AMDGPUUsage.rst

index c8b4072..f6dcfc6 100644 (file)
@@ -2549,7 +2549,7 @@ coherent) and so the L2 cache will coherent with the CPU and other agents.
                                                              always generate
                                                              (see comment for
                                                              previous fence).
-                                                          - Could be split into
+                                                           - Could be split into
                                                              separate s_waitcnt
                                                              vmcnt(0) and
                                                              s_waitcnt