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perf tools: Allow building for tile
authorZhigang Lu <zlu@tilera.com>
Tue, 11 Feb 2014 03:03:48 +0000 (11:03 +0800)
committerChris Metcalf <cmetcalf@tilera.com>
Fri, 7 Mar 2014 16:19:49 +0000 (11:19 -0500)
Tested by building perf:
- Cross-compiled for tile on x86_64
- Built natively on tile

Signed-off-by: Zhigang Lu <zlu@tilera.com>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
tools/perf/config/Makefile.arch
tools/perf/perf.h

index fef8ae9..4b06719 100644 (file)
@@ -5,7 +5,8 @@ ARCH ?= $(shell echo $(uname_M) | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
                                   -e s/arm.*/arm/ -e s/sa110/arm/ \
                                   -e s/s390x/s390/ -e s/parisc64/parisc/ \
                                   -e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
-                                  -e s/sh[234].*/sh/ -e s/aarch64.*/arm64/ )
+                                  -e s/sh[234].*/sh/ -e s/aarch64.*/arm64/ \
+                                  -e s/tile.*/tile/ )
 
 # Additional ARCH settings for x86
 ifeq ($(ARCH),i386)
index e84fa26..75caf68 100644 (file)
 #define CPUINFO_PROC   "core ID"
 #endif
 
+#ifdef __tile__
+#define mb()           asm volatile ("mf" ::: "memory")
+#define wmb()          asm volatile ("mf" ::: "memory")
+#define rmb()          asm volatile ("mf" ::: "memory")
+#define cpu_relax()    asm volatile ("mfspr zero, PASS" ::: "memory")
+#define CPUINFO_PROC    "model name"
+#endif
+
 #define barrier() asm volatile ("" ::: "memory")
 
 #ifndef cpu_relax