- page boundary test case for t0 cycle added.

- bug fix for t0 case pch page boundary crossing during pcl fetch.

diff --git a/simulation/cpu/decoder.vhd b/simulation/cpu/decoder.vhd
index 4cef728..c78ebaf 100644 (file)
--- a/simulation/cpu/decoder.vhd
+++ b/simulation/cpu/decoder.vhd
@@ -2222,15 +2222,23 @@ end  procedure;
                 back_we(pcl_cmd, '1');
                 --pch increment
                 back_we(pch_cmd, '0');
+                back_oe(pch_cmd, '0');
+
+                if ('0' & exec_cycle(4 downto 0) = T0) then
+                    --do the t0 identical routine.
+                    disable_pins;
+                    inst_we_n <= '1';
+                    r_nw <= '1';
 
-                if ('0' & exec_cycle(4 downto 0) = T1) then
+                elsif ('0' & exec_cycle(4 downto 0) = T1) then
                     --if fetch cycle, preserve instrution register
                     inst_we_n <= '1';
+
+                    --TODO: must handle for jmp case???
                 elsif ('0' & exec_cycle(4 downto 0) = T2) then
                     --bug!!!!!
                     --TODO: must disable previous we_n gate.
                 end if;
-                back_oe(pch_cmd, '0');
 
             end if; --if exec_cycle = T0 then
 

diff --git a/tools/test-image/sample1.asm b/tools/test-image/sample1.asm
index 6063272..535a863 100644 (file)
--- a/tools/test-image/sample1.asm
+++ b/tools/test-image/sample1.asm
@@ -77,6 +77,7 @@ copymap:
     .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
 \r
     ;;;syngle byte instruction page boundary test.\r
+    ;;;@80ff\r
 boundary_1:\r
     lda #$01\r
     ror\r
@@ -123,6 +124,7 @@ boundary_2_1:
        lda     #$01\r
        lda     #$01\r
 ;;this is pch increment at T1 cycle. \r
+    ;;;@81ff\r
        ldx     #$08\r
 \r
 \r
@@ -153,8 +155,39 @@ boundary_2_2:
        lda     #$01\r
     ror\r
 ;;this is pch increment at next T0 cycle. \r
+    ;;;@82fe\r
        ldx     #$0a\r
 \r
+    jmp boundary_2_3\r
+\r
+    .byte      $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+    .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+\r
+boundary_2_3:\r
+    ;;;two byte instruction w/ 3 exec cycle page boundary test.\r
+       lda     #$01\r
+       lda     #$01\r
+       lda     #$01\r
+       lda     #$01\r
+       lda     #$01\r
+       lda     #$01\r
+    ror\r
+;;this is pch increment at next T1 cycle. \r
+    ;;;@83fe\r
+       lda $09, x\r
 \r
     nop\r
     nop\r