OSDN Git Service

net/mlx5e: XDP, Add user control for XDP TX MPWQE feature
authorTariq Toukan <tariqt@mellanox.com>
Tue, 20 Nov 2018 09:50:30 +0000 (11:50 +0200)
committerSaeed Mahameed <saeedm@mellanox.com>
Fri, 21 Dec 2018 06:54:20 +0000 (22:54 -0800)
Add ethtool private flag 'xdp_tx_mpwqe' to control the feature
from userspace.
Feature is set ON by default, if supported.

Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/en.h
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
drivers/net/ethernet/mellanox/mlx5/core/en_main.c

index 8f5545d..8fa8fdd 100644 (file)
@@ -216,6 +216,7 @@ enum mlx5e_priv_flag {
        MLX5E_PFLAG_RX_CQE_COMPRESS,
        MLX5E_PFLAG_RX_STRIDING_RQ,
        MLX5E_PFLAG_RX_NO_CSUM_COMPLETE,
+       MLX5E_PFLAG_XDP_TX_MPWQE,
        MLX5E_NUM_PFLAGS, /* Keep last */
 };
 
index 6e10120..c9df081 100644 (file)
@@ -1672,12 +1672,40 @@ static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
        return 0;
 }
 
+static int set_pflag_xdp_tx_mpwqe(struct net_device *netdev, bool enable)
+{
+       struct mlx5e_priv *priv = netdev_priv(netdev);
+       struct mlx5_core_dev *mdev = priv->mdev;
+       struct mlx5e_channels new_channels = {};
+       int err;
+
+       if (enable && !MLX5_CAP_ETH(mdev, enhanced_multi_pkt_send_wqe))
+               return -EOPNOTSUPP;
+
+       new_channels.params = priv->channels.params;
+
+       MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_XDP_TX_MPWQE, enable);
+
+       if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
+               priv->channels.params = new_channels.params;
+               return 0;
+       }
+
+       err = mlx5e_open_channels(priv, &new_channels);
+       if (err)
+               return err;
+
+       mlx5e_switch_priv_channels(priv, &new_channels, NULL);
+       return 0;
+}
+
 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS] = {
        { "rx_cqe_moder",        set_pflag_rx_cqe_based_moder },
        { "tx_cqe_moder",        set_pflag_tx_cqe_based_moder },
        { "rx_cqe_compress",     set_pflag_rx_cqe_compress },
        { "rx_striding_rq",      set_pflag_rx_striding_rq },
        { "rx_no_csum_complete", set_pflag_rx_no_csum_complete },
+       { "xdp_tx_mpwqe",        set_pflag_xdp_tx_mpwqe },
 };
 
 static int mlx5e_handle_pflag(struct net_device *netdev,
index 07b16e5..8cfd2ec 100644 (file)
@@ -2341,7 +2341,7 @@ static void mlx5e_build_xdpsq_param(struct mlx5e_priv *priv,
 
        mlx5e_build_sq_param_common(priv, param);
        MLX5_SET(wq, wq, log_wq_sz, params->log_sq_size);
-       param->is_mpw = MLX5_CAP_ETH(priv->mdev, enhanced_multi_pkt_send_wqe);
+       param->is_mpw = MLX5E_GET_PFLAG(params, MLX5E_PFLAG_XDP_TX_MPWQE);
 }
 
 static void mlx5e_build_channel_param(struct mlx5e_priv *priv,
@@ -4595,6 +4595,10 @@ void mlx5e_build_nic_params(struct mlx5_core_dev *mdev,
                MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE :
                MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE;
 
+       /* XDP SQ */
+       MLX5E_SET_PFLAG(params, MLX5E_PFLAG_XDP_TX_MPWQE,
+                       MLX5_CAP_ETH(mdev, enhanced_multi_pkt_send_wqe));
+
        /* set CQE compression */
        params->rx_cqe_compress_def = false;
        if (MLX5_CAP_GEN(mdev, cqe_compression) &&