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drm/amd/pm: enable ACDC feature
authorKenneth Feng <kenneth.feng@amd.com>
Wed, 3 Feb 2021 10:15:13 +0000 (18:15 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 9 Feb 2021 20:27:19 +0000 (15:27 -0500)
The power limit and clock ragne are different in AC mode and DC mode.
Firmware does the setting after this feature is enabled.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

index e3ba40d..cf59f22 100644 (file)
@@ -294,6 +294,9 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu,
            smu->adev->pg_flags & AMD_PG_SUPPORT_JPEG)
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MM_DPM_PG_BIT);
 
+       if (smu->dc_controlled_by_gpio)
+       *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ACDC_BIT);
+
        return 0;
 }