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RDMA/vmw_pvrdma: Return the correct opcode when creating WR
authorAdit Ranadive <aditr@vmware.com>
Wed, 9 Jan 2019 23:08:49 +0000 (23:08 +0000)
committerJason Gunthorpe <jgg@mellanox.com>
Fri, 11 Jan 2019 00:00:28 +0000 (17:00 -0700)
Since the IB_WR_REG_MR opcode value changed, let's set the PVRDMA device
opcodes explicitly.

Reported-by: Ruishuang Wang <ruishuangw@vmware.com>
Fixes: 9a59739bd01f ("IB/rxe: Revise the ib_wr_opcode enum")
Cc: stable@vger.kernel.org
Reviewed-by: Bryan Tan <bryantan@vmware.com>
Reviewed-by: Ruishuang Wang <ruishuangw@vmware.com>
Reviewed-by: Vishnu Dasa <vdasa@vmware.com>
Signed-off-by: Adit Ranadive <aditr@vmware.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
drivers/infiniband/hw/vmw_pvrdma/pvrdma.h
drivers/infiniband/hw/vmw_pvrdma/pvrdma_qp.c
include/uapi/rdma/vmw_pvrdma-abi.h

index 42b8685..3c633ab 100644 (file)
@@ -427,7 +427,40 @@ static inline enum ib_qp_state pvrdma_qp_state_to_ib(enum pvrdma_qp_state state)
 
 static inline enum pvrdma_wr_opcode ib_wr_opcode_to_pvrdma(enum ib_wr_opcode op)
 {
-       return (enum pvrdma_wr_opcode)op;
+       switch (op) {
+       case IB_WR_RDMA_WRITE:
+               return PVRDMA_WR_RDMA_WRITE;
+       case IB_WR_RDMA_WRITE_WITH_IMM:
+               return PVRDMA_WR_RDMA_WRITE_WITH_IMM;
+       case IB_WR_SEND:
+               return PVRDMA_WR_SEND;
+       case IB_WR_SEND_WITH_IMM:
+               return PVRDMA_WR_SEND_WITH_IMM;
+       case IB_WR_RDMA_READ:
+               return PVRDMA_WR_RDMA_READ;
+       case IB_WR_ATOMIC_CMP_AND_SWP:
+               return PVRDMA_WR_ATOMIC_CMP_AND_SWP;
+       case IB_WR_ATOMIC_FETCH_AND_ADD:
+               return PVRDMA_WR_ATOMIC_FETCH_AND_ADD;
+       case IB_WR_LSO:
+               return PVRDMA_WR_LSO;
+       case IB_WR_SEND_WITH_INV:
+               return PVRDMA_WR_SEND_WITH_INV;
+       case IB_WR_RDMA_READ_WITH_INV:
+               return PVRDMA_WR_RDMA_READ_WITH_INV;
+       case IB_WR_LOCAL_INV:
+               return PVRDMA_WR_LOCAL_INV;
+       case IB_WR_REG_MR:
+               return PVRDMA_WR_FAST_REG_MR;
+       case IB_WR_MASKED_ATOMIC_CMP_AND_SWP:
+               return PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP;
+       case IB_WR_MASKED_ATOMIC_FETCH_AND_ADD:
+               return PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD;
+       case IB_WR_REG_SIG_MR:
+               return PVRDMA_WR_REG_SIG_MR;
+       default:
+               return PVRDMA_WR_ERROR;
+       }
 }
 
 static inline enum ib_wc_status pvrdma_wc_status_to_ib(
index 3acf74c..1ec3646 100644 (file)
@@ -721,6 +721,12 @@ int pvrdma_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
                    wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM)
                        wqe_hdr->ex.imm_data = wr->ex.imm_data;
 
+               if (unlikely(wqe_hdr->opcode == PVRDMA_WR_ERROR)) {
+                       *bad_wr = wr;
+                       ret = -EINVAL;
+                       goto out;
+               }
+
                switch (qp->ibqp.qp_type) {
                case IB_QPT_GSI:
                case IB_QPT_UD:
index d13fd49..6e73f02 100644 (file)
@@ -78,6 +78,7 @@ enum pvrdma_wr_opcode {
        PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD,
        PVRDMA_WR_BIND_MW,
        PVRDMA_WR_REG_SIG_MR,
+       PVRDMA_WR_ERROR,
 };
 
 enum pvrdma_wc_status {