Merge branch 'for-next/spectre-bhb' into for-next/core

Merge in the latest Spectre mess to fix up conflicts with what was
already queued for 5.18 when the embargo finally lifted.

* for-next/spectre-bhb: (21 commits)
  arm64: Do not include __READ_ONCE() block in assembly files
  arm64: proton-pack: Include unprivileged eBPF status in Spectre v2 mitigation reporting
  arm64: Use the clearbhb instruction in mitigations
  KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated
  arm64: Mitigate spectre style branch history side channels
  arm64: proton-pack: Report Spectre-BHB vulnerabilities as part of Spectre-v2
  arm64: Add percpu vectors for EL1
  arm64: entry: Add macro for reading symbol addresses from the trampoline
  arm64: entry: Add vectors that have the bhb mitigation sequences
  arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations
  arm64: entry: Allow the trampoline text to occupy multiple pages
  arm64: entry: Make the kpti trampoline's kpti sequence optional
  arm64: entry: Move trampoline macros out of ifdef'd section
  arm64: entry: Don't assume tramp_vectors is the start of the vectors
  arm64: entry: Allow tramp_alias to access symbols after the 4K boundary
  arm64: entry: Move the trampoline data page before the text page
  arm64: entry: Free up another register on kpti's tramp_exit path
  arm64: entry: Make the trampoline cleanup optional
  KVM: arm64: Allow indirect vectors to be used without SPECTRE_V3A
  arm64: spectre: Rename spectre_v4_patch_fw_mitigation_conduit
  ...

diff --cc arch/arm64/Kconfig
Simple merge

diff --cc arch/arm64/include/asm/assembler.h
Simple merge

diff --cc arch/arm64/include/asm/cpufeature.h
Simple merge

diff --cc arch/arm64/include/asm/cputype.h
Simple merge

diff --cc arch/arm64/include/asm/insn.h
Simple merge

diff --cc arch/arm64/include/asm/spectre.h
Simple merge

diff --cc arch/arm64/include/asm/sysreg.h
index 2023a0e,932d45b..c7ca3a1
--- 1/arch/arm64/include/asm/sysreg.h
--- 2/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@@ -773,8 -773,7 +773,9 @@@
  #define ID_AA64ISAR1_GPI_IMP_DEF              0x1
  
  /* id_aa64isar2 */
+ #define ID_AA64ISAR2_CLEARBHB_SHIFT   28
 +#define ID_AA64ISAR2_APA3_SHIFT               12
 +#define ID_AA64ISAR2_GPA3_SHIFT               8
  #define ID_AA64ISAR2_RPRES_SHIFT      4
  #define ID_AA64ISAR2_WFXT_SHIFT               0
  

diff --cc arch/arm64/kernel/cpu_errata.c
Simple merge

diff --cc arch/arm64/kernel/cpufeature.c
index 32aa0eb,d336876..d72c4b4
--- 1/arch/arm64/kernel/cpufeature.c
--- 2/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@@ -226,10 -231,7 +231,11 @@@ static const struct arm64_ftr_bits ftr_
  };
  
  static const struct arm64_ftr_bits ftr_id_aa64isar2[] = {
+       ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_HIGHER_SAFE, ID_AA64ISAR2_CLEARBHB_SHIFT, 4, 0),
 +      ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
 +                     FTR_STRICT, FTR_EXACT, ID_AA64ISAR2_APA3_SHIFT, 4, 0),
 +      ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
 +                     FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_GPA3_SHIFT, 4, 0),
        ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_RPRES_SHIFT, 4, 0),
        ARM64_FTR_END,
  };

diff --cc arch/arm64/kernel/entry.S
Simple merge

diff --cc arch/arm64/kernel/proton-pack.c
Simple merge

diff --cc arch/arm64/kvm/arm.c
Simple merge

diff --cc arch/arm64/kvm/hyp/vhe/switch.c
Simple merge

diff --cc arch/arm64/mm/mmu.c
Simple merge

diff --cc arch/arm64/tools/cpucaps
Simple merge