fix regression for ARM thumb mode

Sync with GNU libc, see here why r7 is not usable for
thumb mode:
https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/unix/sysv/linux/arm/sysdep.h;h=37eac192b1e2e7f53f112b16450b9ce57054e27f;hb=HEAD
Remove old OABI support.

Fixes build breakage for ARM noMMU builds.
Still no runtime testing.

diff --git a/libc/sysdeps/linux/arm/bits/syscalls.h b/libc/sysdeps/linux/arm/bits/syscalls.h
index 6b747d9..778cc34 100644 (file)
--- a/libc/sysdeps/linux/arm/bits/syscalls.h
+++ b/libc/sysdeps/linux/arm/bits/syscalls.h
@@ -43,41 +43,7 @@
    })                                                                  \
 )
 
-#if !defined(__thumb__)
-#if defined(__ARM_EABI__)
-#define INTERNAL_SYSCALL_NCS(name, err, nr, args...)                   \
-(__extension__ \
-  ({unsigned int __internal_sys_result;                                        \
-     {                                                                 \
-       register int __a1 __asm__ ("r0"), _nr __asm__ ("r7");           \
-       LOAD_ARGS_##nr (args)                                           \
-       _nr = (name);                                                   \
-       __asm__ __volatile__ ("swi      0x0     @ syscall " #name       \
-                            : "=r" (__a1)                              \
-                            : "r" (_nr) ASM_ARGS_##nr                  \
-                            : "memory");                               \
-              __internal_sys_result = __a1;                            \
-     }                                                                 \
-     (int) __internal_sys_result; }) \
-)
-#else /* defined(__ARM_EABI__) */
-
-#define INTERNAL_SYSCALL_NCS(name, err, nr, args...)                   \
-(__extension__ \
-  ({ unsigned int __internal_sys_result;                               \
-     {                                                                 \
-       register int __a1 __asm__ ("a1");                                       \
-       LOAD_ARGS_##nr (args)                                           \
-       __asm__ __volatile__ ("swi      %1      @ syscall " #name       \
-                    : "=r" (__a1)                                      \
-                    : "i" (name) ASM_ARGS_##nr                         \
-                    : "memory");                                       \
-       __internal_sys_result = __a1;                                   \
-     }                                                                 \
-     (int) __internal_sys_result; }) \
-)
-#endif
-#else /* !defined(__thumb__) */
+#if defined(__thumb__)
 /* We can't use push/pop inside the asm because that breaks
    unwinding (ie. thread cancellation).
  */
@@ -101,7 +67,23 @@
     }                                                                  \
     (int) __internal_sys_result; }) \
 )
-#endif /*!defined(__thumb__)*/
+#else /* ARM */
+#define INTERNAL_SYSCALL_NCS(name, err, nr, args...)                   \
+(__extension__ \
+  ({unsigned int __internal_sys_result;                                        \
+     {                                                                 \
+       register int __a1 __asm__ ("r0"), _nr __asm__ ("r7");           \
+       LOAD_ARGS_##nr (args)                                           \
+       _nr = (name);                                                   \
+       __asm__ __volatile__ ("swi      0x0     @ syscall " #name       \
+                            : "=r" (__a1)                              \
+                            : "r" (_nr) ASM_ARGS_##nr                  \
+                            : "memory");                               \
+              __internal_sys_result = __a1;                            \
+     }                                                                 \
+     (int) __internal_sys_result; }) \
+)
+#endif
 
 #define INTERNAL_SYSCALL_ERROR_P(val, err) \
   ((unsigned int) (val) >= 0xfffff001u)
@@ -138,11 +120,13 @@
   LOAD_ARGS_5 (a1, a2, a3, a4, a5)             \
   register int _v2 __asm__ ("v2") = _v2tmp;
 #define ASM_ARGS_6     ASM_ARGS_5, "r" (_v2)
+#ifndef __thumb__
 #define LOAD_ARGS_7(a1, a2, a3, a4, a5, a6, a7)        \
   int _v3tmp = (int) (a7);                     \
   LOAD_ARGS_6 (a1, a2, a3, a4, a5, a6)         \
   register int _v3 __asm__ ("v3") = _v3tmp;
 #define ASM_ARGS_7     ASM_ARGS_6, "r" (_v3)
+#endif
 
 
 #endif /* __ASSEMBLER__ */

diff --git a/libc/sysdeps/linux/common/sync_file_range.c b/libc/sysdeps/linux/common/sync_file_range.c
index db797de..52bc9d7 100644 (file)
--- a/libc/sysdeps/linux/common/sync_file_range.c
+++ b/libc/sysdeps/linux/common/sync_file_range.c
@@ -24,6 +24,9 @@ static int __NC(sync_file_range)(int fd, off64_t offset, off64_t nbytes, unsigne
 {
 #  if defined __powerpc__ && __WORDSIZE == 64
        return INLINE_SYSCALL(sync_file_range, 4, fd, flags, offset, nbytes);
+#  elif defined __arm__ && defined __thumb__
+       return INLINE_SYSCALL(sync_file_range, 6, fd,
+                       OFF64_HI_LO(offset), OFF64_HI_LO(nbytes), flags);
 #  elif (defined __mips__ && _MIPS_SIM == _ABIO32) || \
        (defined(__UCLIBC_SYSCALL_ALIGN_64BIT__) && !(defined(__powerpc__) || defined(__xtensa__)))
        /* arch with 64-bit data in even reg alignment #2: [arcv2/others-in-future]