void DISPLAY::init_memsw()
{
for(int i = 0; i < 16; i++) {
- tvram[0x3fe0 + (i << 1)] = memsw_default[i];
+// tvram[0x3fe0 + (i << 1)] = memsw_default[i];
+ tvram[0x3fe0 + (i << 1)] = 0x00;
}
}
egc_srcmask.w = 0xffff;
#endif
- if((config.dipswitch & (1 << DIPSWITCH_POSITION_NOINIT_MEMSW)) == 0) {
- init_memsw();
- }
+// if((config.dipswitch & (1 << DIPSWITCH_POSITION_NOINIT_MEMSW)) == 0) {
+// init_memsw();
+// }
save_memsw();
font_code = 0;
font_line = 0;
}
#else // HIRESO
set_memory_mapped_io_rw(0xc0000, 0xe4fff, d_display);
+ set_wait_rw(0xc0000, 0xe4fff, gvram_wait_val); // OK?
#if defined(SUPPORT_BIOS_RAM) && defined(SUPPORT_32BIT_ADDRESS)
if(shadow_ram_selected) {
set_memory_rw(0xc0000, 0xe7fff, &(ram[0xc0000])); // OK?
}
#endif
#endif
- set_wait_rw(0x00100000 - sizeof(bios), 0xfffff, introm_wait);
{
#if defined(SUPPORT_BIOS_RAM)
if(bios_ram_selected) {
// unset_memory_w(0x00100000 - sizeof(itf), 0x000fffff);
} //else
#endif
-
-
+ set_wait_rw(0x00100000 - sizeof(bios), 0xfffff, introm_wait);
+
#if defined(SUPPORT_32BIT_ADDRESS) || defined(SUPPORT_24BIT_ADDRESS)
#if defined(SUPPORT_NEC_EMS)
// Is It right?
if(nec_ems_selected) {
unset_memory_rw(0xb0000, 0xbffff);
set_memory_rw(0xb0000, 0xbffff, nec_ems);
+ set_wait_rw(0xb0000, 0xbffff, slotmem_wait);
} else {
unset_memory_rw(0xb0000, 0xbffff);
set_memory_mapped_io_rw(0xb0000, 0xbffff, d_display);
+ set_wait_rw(0xb0000, 0xbffff, gvram_wait_val);
}
- set_wait_rw(0xb0000, 0xbffff, slotmem_wait);
}
#endif
int introm_wait = 0; // INTERNAL ROM (BIOS, ITF)
int bank08_wait = 2/*8*/;
int intram_wait = 0;
+ int gvram_wait = intram_wait;
int cpuclock = 8000000;
// TODO: INTA
#if defined(_PC9801RA) || defined(_PC9801RL)
#endif
io_wait = 8;
}
+ gvram_wait = intram_wait + 1; // OK?
#elif defined(_PC98XL2)
// ToDo: V30
exboards_wait = 12;
// inta_wait = 14;
}
+ gvram_wait = intram_wait + 1; // OK?
#elif defined(_PC98XL)
if(dispmode == 0) {
exboards_wait = 4;
cpuclock = (clock == 0) ? 10000000 : 8000000;
}
+ gvram_wait = intram_wait + 1; // OK?
#elif defined(_PC9801VM21) || defined(_PC9801VX)
// ToDo: V30
exboards_wait = 4;
// inta_wait = 5;
}
+ gvram_wait = intram_wait + 1; // OK?
#elif defined(_PC9801U) || defined(_PC9801VF) || defined(_PC9801VM) || defined(_PC9801UV)
if(clock == 0) { // FAST CLOCK (10MHz)
cpuclock = 10000000;
exboards_wait = intram_wait;
introm_wait = intram_wait;
bank08_wait = intram_wait;
+ gvram_wait = intram_wait; // OK?
#elif defined(_PC98XA)
cpuclock = 8000000;
intram_wait = 1;
exboards_wait = intram_wait;
introm_wait = intram_wait;
bank08_wait = intram_wait;
+ gvram_wait = intram_wait; // OK?
#elif defined(_PC9801E) || defined(_PC9801F) || defined(_PC9801M) || defined(_PC9801)
// ToDo: Others.
if(clock == 0) { // FAST CLOCK (8MHz)
exboards_wait = intram_wait;
introm_wait = intram_wait;
bank08_wait = intram_wait;
+ gvram_wait = intram_wait; // OK?
#endif
memory->write_signal(SIG_INTRAM_WAIT, intram_wait, 0xff);
memory->write_signal(SIG_BANK08_WAIT, bank08_wait, 0xff);
waitval = (int)round(((double)cpuclock) / (1.0e6 / 1.6));
if(waitval < 1) waitval = 0;
memory->write_signal(SIG_TVRAM_WAIT, waitval, 0xfffff); // OK?
- memory->write_signal(SIG_GVRAM_WAIT, intram_wait, 0xfffff); // OK?
+ memory->write_signal(SIG_GVRAM_WAIT, gvram_wait, 0xfffff); // OK?
// memory->write_signal(SIG_GVRAM_WAIT, waitval, 0xfffff); // OK?
}