drm/amd/display: Add VESA SCR case for default aux backlight

[How & Why]
When determining default aux backlight level, read from
DPCD address 0x734 for VESA SCR on OLED.

Reviewed-by: Felipe Clark <felipe.clark@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Iswara Nagulendran <iswara.nagulendran@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
index 92f58a7..5add236 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
@@ -252,10 +252,20 @@ static bool read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millin
                link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))
                return false;
 
-       if (!core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,
-               (uint8_t *) backlight_millinits,
-               sizeof(uint32_t)))
-               return false;
+       if (!link->dpcd_caps.panel_luminance_control) {
+               if (!core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,
+                       (uint8_t *)backlight_millinits,
+                       sizeof(uint32_t)))
+                       return false;
+       } else {
+               //setting to 0 as a precaution, since target_luminance_value is 3 bytes
+               memset(backlight_millinits, 0, sizeof(uint32_t));
+
+               if (!core_link_read_dpcd(link, DP_EDP_PANEL_TARGET_LUMINANCE_VALUE,
+                       (uint8_t *)backlight_millinits,
+                       sizeof(struct target_luminance_value)))
+                       return false;
+       }
 
        return true;
 }