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drm/i915/skl: Double RC6 WRL always on
author
Mika Kuoppala
<mika.kuoppala@linux.intel.com>
Mon, 7 Dec 2015 16:29:45 +0000
(18:29 +0200)
committer
Jani Nikula
<jani.nikula@intel.com>
Tue, 8 Dec 2015 14:18:45 +0000
(16:18 +0200)
WaRsDoubleRc6WrlWithCoarsePowerGating should
be enabled for all Skylakes. Make it so.
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Link:
http://patchwork.freedesktop.org/patch/msgid/1449505785-20812-2-git-send-email-mika.kuoppala@intel.com
(cherry picked from commit
e7674b8c31717dd0c58b3a9493d43249722071eb
)
Cc: stable@vger.kernel.org # v4.3+
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_pm.c
patch
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diff --git
a/drivers/gpu/drm/i915/intel_pm.c
b/drivers/gpu/drm/i915/intel_pm.c
index
183dd77
..
f091ad1
100644
(file)
--- a/
drivers/gpu/drm/i915/intel_pm.c
+++ b/
drivers/gpu/drm/i915/intel_pm.c
@@
-4782,8
+4782,7
@@
static void gen9_enable_rc6(struct drm_device *dev)
/* 2b: Program RC6 thresholds.*/
/* WaRsDoubleRc6WrlWithCoarsePowerGating: Doubling WRL only when CPG is enabled */
- if (IS_SKYLAKE(dev) && !((IS_SKL_GT3(dev) || IS_SKL_GT4(dev)) &&
- (INTEL_REVID(dev) <= SKL_REVID_E0)))
+ if (IS_SKYLAKE(dev))
I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 108 << 16);
else
I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16);