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clk: aspeed: Add 24MHz fixed clock
authorLei YU <mine260309@gmail.com>
Fri, 18 May 2018 08:57:02 +0000 (16:57 +0800)
committerStephen Boyd <sboyd@kernel.org>
Fri, 1 Jun 2018 19:18:42 +0000 (12:18 -0700)
Add a 24MHz fixed clock.
This clock will be used for certain devices, e.g. pwm.

Signed-off-by: Lei YU <mine260309@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/clk-aspeed.c
include/dt-bindings/clock/aspeed-clock.h

index 5eb50c3..4664088 100644 (file)
@@ -14,7 +14,7 @@
 
 #include <dt-bindings/clock/aspeed-clock.h>
 
-#define ASPEED_NUM_CLKS                35
+#define ASPEED_NUM_CLKS                36
 
 #define ASPEED_RESET_CTRL      0x04
 #define ASPEED_CLK_SELECTION   0x08
@@ -474,6 +474,13 @@ static int aspeed_clk_probe(struct platform_device *pdev)
                return PTR_ERR(hw);
        aspeed_clk_data->hws[ASPEED_CLK_BCLK] = hw;
 
+       /* Fixed 24MHz clock */
+       hw = clk_hw_register_fixed_rate(NULL, "fixed-24m", "clkin",
+                                       0, 24000000);
+       if (IS_ERR(hw))
+               return PTR_ERR(hw);
+       aspeed_clk_data->hws[ASPEED_CLK_24M] = hw;
+
        /*
         * TODO: There are a number of clocks that not included in this driver
         * as more information is required:
index d3558d8..ff29d8e 100644 (file)
@@ -38,6 +38,7 @@
 #define ASPEED_CLK_MAC                 32
 #define ASPEED_CLK_BCLK                        33
 #define ASPEED_CLK_MPLL                        34
+#define ASPEED_CLK_24M                 35
 
 #define ASPEED_RESET_XDMA              0
 #define ASPEED_RESET_MCTP              1