net/mlx5: Added "per_lane_error_counters" cap bit to PCAM

Added "Per lane raw errors" capability bit in
Ports Capabilities Mask (PCAM) enhanced features
layout.

This bit determines if the fields "phy_raw_errors_laneX"
in "Physical Layer statistical" counters group are supported.

Signed-off-by: Shay Agroskin <shayag@mellanox.com>
Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 47b09a7..dbff9ff 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -8140,7 +8140,8 @@ struct mlx5_ifc_pcam_enhanced_features_bits {
        u8         rx_icrc_encapsulated_counter[0x1];
        u8         reserved_at_6e[0x8];
        u8         pfcc_mask[0x1];
-       u8         reserved_at_77[0x4];
+       u8         reserved_at_77[0x3];
+       u8         per_lane_error_counters[0x1];
        u8         rx_buffer_fullness_counters[0x1];
        u8         ptys_connector_type[0x1];
        u8         reserved_at_7d[0x1];