net: phy: realtek: add delay to fix RXC generation issue

PHY will delay about 11.5ms to generate RXC clock when switching from
power down to normal operation. Read/write registers would also cause RXC
become unstable and stop for a while during this process. Realtek engineer
suggests 15ms or more delay can workaround this issue.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 79dc55b..1b844a0 100644 (file)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -410,6 +410,19 @@ static int rtl8211f_config_init(struct phy_device *phydev)
        return genphy_soft_reset(phydev);
 }
 
+static int rtl821x_resume(struct phy_device *phydev)
+{
+       int ret;
+
+       ret = genphy_resume(phydev);
+       if (ret < 0)
+               return ret;
+
+       msleep(20);
+
+       return 0;
+}
+
 static int rtl8211e_config_init(struct phy_device *phydev)
 {
        int ret = 0, oldpage;
@@ -906,7 +919,7 @@ static struct phy_driver realtek_drvs[] = {
                .config_intr    = &rtl8211f_config_intr,
                .handle_interrupt = rtl8211f_handle_interrupt,
                .suspend        = genphy_suspend,
-               .resume         = genphy_resume,
+               .resume         = rtl821x_resume,
                .read_page      = rtl821x_read_page,
                .write_page     = rtl821x_write_page,
        }, {