DisasContextBase base;
MicroBlazeCPU *cpu;
+ /* TCG op of the current insn_start. */
+ TCGOp *insn_start;
+
TCGv_i32 r0;
bool r0_set;
unsigned int cpustate_changed;
unsigned int delayed_branch;
- unsigned int tb_flags, synced_flags; /* tb dependent flags. */
+ unsigned int tb_flags;
unsigned int clear_imm;
int mem_index;
/* Include the auto-generated decoder. */
#include "decode-insns.c.inc"
-static inline void t_sync_flags(DisasContext *dc)
+static void t_sync_flags(DisasContext *dc)
{
/* Synch the tb dependent flags between translator and runtime. */
- if (dc->tb_flags != dc->synced_flags) {
- tcg_gen_movi_i32(cpu_iflags, dc->tb_flags);
- dc->synced_flags = dc->tb_flags;
+ if ((dc->tb_flags ^ dc->base.tb->flags) & ~MSR_TB_MASK) {
+ tcg_gen_movi_i32(cpu_iflags, dc->tb_flags & ~MSR_TB_MASK);
}
}
}
}
- t_sync_flags(dc);
sync_jmpstate(dc);
/*
/* lwx does not throw unaligned access errors, so force alignment */
tcg_gen_andi_tl(addr, addr, ~3);
- t_sync_flags(dc);
sync_jmpstate(dc);
tcg_gen_qemu_ld_i32(cpu_res_val, addr, dc->mem_index, MO_TEUL);
}
}
- t_sync_flags(dc);
sync_jmpstate(dc);
tcg_gen_qemu_st_i32(reg_for_read(dc, rd), addr, mem_index, mop);
TCGLabel *swx_fail = gen_new_label();
TCGv_i32 tval;
- t_sync_flags(dc);
sync_jmpstate(dc);
/* swx does not throw unaligned access errors, so force alignment */
int bound;
dc->cpu = cpu;
- dc->synced_flags = dc->tb_flags = dc->base.tb->flags;
+ dc->tb_flags = dc->base.tb->flags;
dc->delayed_branch = !!(dc->tb_flags & D_FLAG);
dc->jmp = dc->delayed_branch ? JMP_INDIRECT : JMP_NOJMP;
dc->cpustate_changed = 0;
static void mb_tr_insn_start(DisasContextBase *dcb, CPUState *cs)
{
- tcg_gen_insn_start(dcb->pc_next);
+ DisasContext *dc = container_of(dcb, DisasContext, base);
+
+ tcg_gen_insn_start(dc->base.pc_next, dc->tb_flags & ~MSR_TB_MASK);
+ dc->insn_start = tcg_last_op();
}
static bool mb_tr_breakpoint_check(DisasContextBase *dcb, CPUState *cs,
target_ulong *data)
{
env->pc = data[0];
+ env->iflags = data[1];
}