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radeon: Prepare radeon for msi support.
authorRobert Noland <rnoland@2hip.net>
Tue, 24 Feb 2009 18:28:42 +0000 (12:28 -0600)
committerRobert Noland <rnoland@2hip.net>
Tue, 24 Feb 2009 18:28:42 +0000 (12:28 -0600)
shared-core/radeon_irq.c

index 836f384..165e7bd 100644 (file)
@@ -189,6 +189,7 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
            (drm_radeon_private_t *) dev->dev_private;
        u32 stat;
        u32 r500_disp_int;
+       u32 tmp;
 
        /* Only consider the bits we're interested in - others could be used
         * outside the DRM
@@ -215,6 +216,33 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
                if (stat & RADEON_CRTC2_VBLANK_STAT)
                        drm_handle_vblank(dev, 1);
        }
+       if (dev->msi_enabled) {
+               switch(dev_priv->flags & RADEON_FAMILY_MASK) {
+                       case CHIP_RS400:
+                       case CHIP_RS480:
+                               tmp = RADEON_READ(RADEON_AIC_CNTL) &
+                                   ~RS400_MSI_REARM;
+                               RADEON_WRITE(RADEON_AIC_CNTL, tmp);
+                               RADEON_WRITE(RADEON_AIC_CNTL,
+                                   tmp | RS400_MSI_REARM);
+                               break;
+                       case CHIP_RS690:
+                       case CHIP_RS740:
+                               tmp = RADEON_READ(RADEON_BUS_CNTL) &
+                                   ~RS600_MSI_REARM;
+                               RADEON_WRITE(RADEON_BUS_CNTL, tmp);
+                               RADEON_WRITE(RADEON_BUS_CNTL, tmp |
+                                   RS600_MSI_REARM);
+                               break;
+                        default:
+                               tmp = RADEON_READ(RADEON_MSI_REARM_EN) &
+                                   ~RV370_MSI_REARM_EN;
+                               RADEON_WRITE(RADEON_MSI_REARM_EN, tmp);
+                               RADEON_WRITE(RADEON_MSI_REARM_EN,
+                                   tmp | RV370_MSI_REARM_EN);
+                               break;
+               }
+       }
        return IRQ_HANDLED;
 }