bpf/tests: Add exhaustive tests of ALU shift values

This patch adds a set of tests for ALU64 and ALU32 shift operations to
verify correctness for all possible values of the shift value. Mainly
intended for JIT testing.

Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Link: https://lore.kernel.org/bpf/20210914091842.4186267-4-johan.almbladh@anyfinetworks.com

diff --git a/lib/test_bpf.c b/lib/test_bpf.c
index c865fd5..d599c2a 100644 (file)
--- a/lib/test_bpf.c
+++ b/lib/test_bpf.c
@@ -497,6 +497,168 @@ static int bpf_fill_long_jmp(struct bpf_test *self)
        return 0;
 }
 
+static int __bpf_ld_imm64(struct bpf_insn insns[2], u8 reg, s64 imm64)
+{
+       struct bpf_insn tmp[] = {BPF_LD_IMM64(reg, imm64)};
+
+       memcpy(insns, tmp, sizeof(tmp));
+       return 2;
+}
+
+/* Test an ALU shift operation for all valid shift values */
+static int __bpf_fill_alu_shift(struct bpf_test *self, u8 op,
+                               u8 mode, bool alu32)
+{
+       static const s64 regs[] = {
+               0x0123456789abcdefLL, /* dword > 0, word < 0 */
+               0xfedcba9876543210LL, /* dowrd < 0, word > 0 */
+               0xfedcba0198765432LL, /* dowrd < 0, word < 0 */
+               0x0123458967abcdefLL, /* dword > 0, word > 0 */
+       };
+       int bits = alu32 ? 32 : 64;
+       int len = (2 + 7 * bits) * ARRAY_SIZE(regs) + 3;
+       struct bpf_insn *insn;
+       int imm, k;
+       int i = 0;
+
+       insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL);
+       if (!insn)
+               return -ENOMEM;
+
+       insn[i++] = BPF_ALU64_IMM(BPF_MOV, R0, 0);
+
+       for (k = 0; k < ARRAY_SIZE(regs); k++) {
+               s64 reg = regs[k];
+
+               i += __bpf_ld_imm64(&insn[i], R3, reg);
+
+               for (imm = 0; imm < bits; imm++) {
+                       u64 val;
+
+                       /* Perform operation */
+                       insn[i++] = BPF_ALU64_REG(BPF_MOV, R1, R3);
+                       insn[i++] = BPF_ALU64_IMM(BPF_MOV, R2, imm);
+                       if (alu32) {
+                               if (mode == BPF_K)
+                                       insn[i++] = BPF_ALU32_IMM(op, R1, imm);
+                               else
+                                       insn[i++] = BPF_ALU32_REG(op, R1, R2);
+                               switch (op) {
+                               case BPF_LSH:
+                                       val = (u32)reg << imm;
+                                       break;
+                               case BPF_RSH:
+                                       val = (u32)reg >> imm;
+                                       break;
+                               case BPF_ARSH:
+                                       val = (u32)reg >> imm;
+                                       if (imm > 0 && (reg & 0x80000000))
+                                               val |= ~(u32)0 << (32 - imm);
+                                       break;
+                               }
+                       } else {
+                               if (mode == BPF_K)
+                                       insn[i++] = BPF_ALU64_IMM(op, R1, imm);
+                               else
+                                       insn[i++] = BPF_ALU64_REG(op, R1, R2);
+                               switch (op) {
+                               case BPF_LSH:
+                                       val = (u64)reg << imm;
+                                       break;
+                               case BPF_RSH:
+                                       val = (u64)reg >> imm;
+                                       break;
+                               case BPF_ARSH:
+                                       val = (u64)reg >> imm;
+                                       if (imm > 0 && reg < 0)
+                                               val |= ~(u64)0 << (64 - imm);
+                                       break;
+                               }
+                       }
+
+                       /*
+                        * When debugging a JIT that fails this test, one
+                        * can write the immediate value to R0 here to find
+                        * out which operand values that fail.
+                        */
+
+                       /* Load reference and check the result */
+                       i += __bpf_ld_imm64(&insn[i], R4, val);
+                       insn[i++] = BPF_JMP_REG(BPF_JEQ, R1, R4, 1);
+                       insn[i++] = BPF_EXIT_INSN();
+               }
+       }
+
+       insn[i++] = BPF_ALU64_IMM(BPF_MOV, R0, 1);
+       insn[i++] = BPF_EXIT_INSN();
+
+       self->u.ptr.insns = insn;
+       self->u.ptr.len = len;
+       BUG_ON(i > len);
+
+       return 0;
+}
+
+static int bpf_fill_alu_lsh_imm(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_LSH, BPF_K, false);
+}
+
+static int bpf_fill_alu_rsh_imm(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_RSH, BPF_K, false);
+}
+
+static int bpf_fill_alu_arsh_imm(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_K, false);
+}
+
+static int bpf_fill_alu_lsh_reg(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_LSH, BPF_X, false);
+}
+
+static int bpf_fill_alu_rsh_reg(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_RSH, BPF_X, false);
+}
+
+static int bpf_fill_alu_arsh_reg(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_X, false);
+}
+
+static int bpf_fill_alu32_lsh_imm(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_LSH, BPF_K, true);
+}
+
+static int bpf_fill_alu32_rsh_imm(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_RSH, BPF_K, true);
+}
+
+static int bpf_fill_alu32_arsh_imm(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_K, true);
+}
+
+static int bpf_fill_alu32_lsh_reg(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_LSH, BPF_X, true);
+}
+
+static int bpf_fill_alu32_rsh_reg(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_RSH, BPF_X, true);
+}
+
+static int bpf_fill_alu32_arsh_reg(struct bpf_test *self)
+{
+       return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_X, true);
+}
+
 static struct bpf_test tests[] = {
        {
                "TAX",
@@ -8414,6 +8576,104 @@ static struct bpf_test tests[] = {
                {},
                { { 0, 2 } },
        },
+       /* Exhaustive test of ALU64 shift operations */
+       {
+               "ALU64_LSH_K: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu_lsh_imm,
+       },
+       {
+               "ALU64_RSH_K: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu_rsh_imm,
+       },
+       {
+               "ALU64_ARSH_K: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu_arsh_imm,
+       },
+       {
+               "ALU64_LSH_X: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu_lsh_reg,
+       },
+       {
+               "ALU64_RSH_X: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu_rsh_reg,
+       },
+       {
+               "ALU64_ARSH_X: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu_arsh_reg,
+       },
+       /* Exhaustive test of ALU32 shift operations */
+       {
+               "ALU32_LSH_K: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu32_lsh_imm,
+       },
+       {
+               "ALU32_RSH_K: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu32_rsh_imm,
+       },
+       {
+               "ALU32_ARSH_K: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu32_arsh_imm,
+       },
+       {
+               "ALU32_LSH_X: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu32_lsh_reg,
+       },
+       {
+               "ALU32_RSH_X: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu32_rsh_reg,
+       },
+       {
+               "ALU32_ARSH_X: all shift values",
+               { },
+               INTERNAL | FLAG_NO_DATA,
+               { },
+               { { 0, 1 } },
+               .fill_helper = bpf_fill_alu32_arsh_reg,
+       },
 };
 
 static struct net_device dev;