intel/intel_chipset: Move IS_9XX below IS_GEN10.

No functional change. Just organizing the code
so it gets clear for future platforms.

Paulo deserves credits becuase he was the one
that just noticed this IS_9XX was in the wrong position
after CNL patches got introduced.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 770d21f..3ff59ad 100644 (file)
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -499,15 +499,6 @@
                                 IS_GEMINILAKE(devid) || \
                                 IS_COFFEELAKE(devid))
 
-#define IS_9XX(dev)            (IS_GEN3(dev) || \
-                                IS_GEN4(dev) || \
-                                IS_GEN5(dev) || \
-                                IS_GEN6(dev) || \
-                                IS_GEN7(dev) || \
-                                IS_GEN8(dev) || \
-                                IS_GEN9(dev) || \
-                                IS_GEN10(dev))
-
 #define IS_CNL_Y(devid)                ((devid) == PCI_CHIP_CANNONLAKE_Y_GT2_0 || \
                                 (devid) == PCI_CHIP_CANNONLAKE_Y_GT2_1 || \
                                 (devid) == PCI_CHIP_CANNONLAKE_Y_GT2_2 || \
@@ -525,4 +516,13 @@
 
 #define IS_GEN10(devid)                (IS_CANNONLAKE(devid))
 
+#define IS_9XX(dev)            (IS_GEN3(dev) || \
+                                IS_GEN4(dev) || \
+                                IS_GEN5(dev) || \
+                                IS_GEN6(dev) || \
+                                IS_GEN7(dev) || \
+                                IS_GEN8(dev) || \
+                                IS_GEN9(dev) || \
+                                IS_GEN10(dev))
+
 #endif /* _INTEL_CHIPSET_H */