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drm/amdgpu: use VCN firmware offset for cache window
authorJames Zhu <James.Zhu@amd.com>
Tue, 23 Jul 2019 20:45:19 +0000 (16:45 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 31 Jul 2019 04:19:28 +0000 (23:19 -0500)
Since we are using the signed FW now, and also using PSP firmware loading,
but it's still potential to break driver when loading FW directly
instead of PSP, so we should add offset.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

index ef8bb67..0c84dbc 100644 (file)
@@ -396,11 +396,8 @@ static void vcn_v2_5_mc_resume(struct amdgpu_device *adev)
                        WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
                                upper_32_bits(adev->vcn.inst[i].gpu_addr));
                        offset = size;
-                       /* No signed header for now from firmware
                        WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0,
                                AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
-                       */
-                       WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, 0);
                }
                WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE0, size);