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Use the correct shift amount type.
author
Owen Anderson
<resistor@mac.com>
Mon, 28 Feb 2011 21:10:10 +0000
(21:10 +0000)
committer
Owen Anderson
<resistor@mac.com>
Mon, 28 Feb 2011 21:10:10 +0000
(21:10 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126684
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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diff --git
a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index
c3e9f9a
..
767b774
100644
(file)
--- a/
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@
-226,7
+226,7
@@
SDValue DAGTypeLegalizer::PromoteIntRes_BSWAP(SDNode *N) {
unsigned DiffBits = NVT.getSizeInBits() - OVT.getSizeInBits();
return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op),
- DAG.getConstant(DiffBits, TLI.get
PointerTy(
)));
+ DAG.getConstant(DiffBits, TLI.get
ShiftAmountTy(NVT
)));
}
SDValue DAGTypeLegalizer::PromoteIntRes_BUILD_PAIR(SDNode *N) {