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drm/i915/icl: Fix the TRANS_DDI_FUNC_CTL2 bitfield macro
author
Manasi Navare
<manasi.d.navare@intel.com>
Tue, 19 Mar 2019 22:18:47 +0000
(15:18 -0700)
committer
Rodrigo Vivi
<rodrigo.vivi@intel.com>
Thu, 21 Mar 2019 19:57:32 +0000
(12:57 -0700)
This patch fixes the PORT_SYNC_MODE_MASTER_SELECT macro
to correctly do the left shifting to set the port sync
master select correctly.
I have tested this fix on ICL.
Fixes:
49edbd49786e
("drm/i915/icl: Define TRANS_DDI_FUNC_CTL DSI registers")
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: <stable@vger.kernel.org> # v5.0+
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link:
https://patchwork.freedesktop.org/patch/msgid/20190319221847.21311-1-manasi.d.navare@intel.com
(cherry picked from commit
7264aebb81d15aa6bbed650c816bba90f026bc35
)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/i915/i915_reg.h
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diff --git
a/drivers/gpu/drm/i915/i915_reg.h
b/drivers/gpu/drm/i915/i915_reg.h
index
638a586
..
684589a
100644
(file)
--- a/
drivers/gpu/drm/i915/i915_reg.h
+++ b/
drivers/gpu/drm/i915/i915_reg.h
@@
-9243,7
+9243,7
@@
enum skl_power_gate {
#define TRANS_DDI_FUNC_CTL2(tran) _MMIO_TRANS2(tran, \
_TRANS_DDI_FUNC_CTL2_A)
#define PORT_SYNC_MODE_ENABLE (1 << 4)
-#define PORT_SYNC_MODE_MASTER_SELECT(x) ((x) < 0)
+#define PORT_SYNC_MODE_MASTER_SELECT(x) ((x) <
<
0)
#define PORT_SYNC_MODE_MASTER_SELECT_MASK (0x7 << 0)
#define PORT_SYNC_MODE_MASTER_SELECT_SHIFT 0