}
// Return true when the decision to generate FMA's (or FMS, FMLA etc) rather
// than FMUL and ADD is delegated to the machine combiner.
- virtual bool GenerateFMAsInMachineCombiner(CodeGenOpt::Level OptLevel) const {
+ virtual bool generateFMAsInMachineCombiner(CodeGenOpt::Level OptLevel) const {
return false;
}
};
const SelectionDAGTargetInfo *STI = DAG.getSubtarget().getSelectionDAGInfo();
;
- if (AllowFusion && STI && STI->GenerateFMAsInMachineCombiner(OptLevel))
+ if (AllowFusion && STI && STI->generateFMAsInMachineCombiner(OptLevel))
return SDValue();
// Always prefer FMAD to FMA for precision.
return SDValue();
const SelectionDAGTargetInfo *STI = DAG.getSubtarget().getSelectionDAGInfo();
- if (AllowFusion && STI && STI->GenerateFMAsInMachineCombiner(OptLevel))
+ if (AllowFusion && STI && STI->generateFMAsInMachineCombiner(OptLevel))
return SDValue();
// Always prefer FMAD to FMA for precision.
}
return SDValue();
}
-bool AArch64SelectionDAGInfo::GenerateFMAsInMachineCombiner(
+bool AArch64SelectionDAGInfo::generateFMAsInMachineCombiner(
CodeGenOpt::Level OptLevel) const {
if (OptLevel >= CodeGenOpt::Aggressive)
return true;
SDValue Dst, SDValue Src, SDValue Size,
unsigned Align, bool isVolatile,
MachinePointerInfo DstPtrInfo) const override;
- bool GenerateFMAsInMachineCombiner(CodeGenOpt::Level OptLevel) const override;
+ bool generateFMAsInMachineCombiner(CodeGenOpt::Level OptLevel) const override;
};
}