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regulator: qcom_spmi: Improve readability for setting up enable/mode pin control
authorAxel Lin <axel.lin@ingics.com>
Sat, 1 Aug 2020 05:48:20 +0000 (13:48 +0800)
committerMark Brown <broonie@kernel.org>
Tue, 18 Aug 2020 16:18:45 +0000 (17:18 +0100)
By checking data->pin_ctrl_enable / data->pin_ctrl_hpm flags first, then
use switch-case to improve readability.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200801054820.134859-1-axel.lin@ingics.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/regulator/qcom_spmi-regulator.c

index 5ee7c53..0508048 100644 (file)
@@ -1633,45 +1633,43 @@ static int spmi_regulator_init_registers(struct spmi_regulator *vreg,
                return ret;
 
        /* Set up enable pin control. */
-       if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
-            || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO
-            || type == SPMI_REGULATOR_LOGICAL_TYPE_VS)
-           && !(data->pin_ctrl_enable
-                       & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) {
-               ctrl_reg[SPMI_COMMON_IDX_ENABLE] &=
-                       ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
-               ctrl_reg[SPMI_COMMON_IDX_ENABLE] |=
-                   data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
+       if (!(data->pin_ctrl_enable & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) {
+               switch (type) {
+               case SPMI_REGULATOR_LOGICAL_TYPE_SMPS:
+               case SPMI_REGULATOR_LOGICAL_TYPE_LDO:
+               case SPMI_REGULATOR_LOGICAL_TYPE_VS:
+                       ctrl_reg[SPMI_COMMON_IDX_ENABLE] &=
+                               ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
+                       ctrl_reg[SPMI_COMMON_IDX_ENABLE] |=
+                               data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
+                       break;
+               default:
+                       break;
+               }
        }
 
        /* Set up mode pin control. */
-       if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
-           || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO)
-               && !(data->pin_ctrl_hpm
-                       & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
-               ctrl_reg[SPMI_COMMON_IDX_MODE] &=
-                       ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
-               ctrl_reg[SPMI_COMMON_IDX_MODE] |=
-                       data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
-       }
-
-       if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS
-          && !(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
-               ctrl_reg[SPMI_COMMON_IDX_MODE] &=
-                       ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
-               ctrl_reg[SPMI_COMMON_IDX_MODE] |=
-                      data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
-       }
-
-       if ((type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS
-               || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS
-               || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO)
-               && !(data->pin_ctrl_hpm
-                       & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
-               ctrl_reg[SPMI_COMMON_IDX_MODE] &=
-                       ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
-               ctrl_reg[SPMI_COMMON_IDX_MODE] |=
-                      data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
+       if (!(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
+               switch (type) {
+               case SPMI_REGULATOR_LOGICAL_TYPE_SMPS:
+               case SPMI_REGULATOR_LOGICAL_TYPE_LDO:
+                       ctrl_reg[SPMI_COMMON_IDX_MODE] &=
+                               ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
+                       ctrl_reg[SPMI_COMMON_IDX_MODE] |=
+                               data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
+                       break;
+               case SPMI_REGULATOR_LOGICAL_TYPE_VS:
+               case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS:
+               case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS:
+               case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO:
+                       ctrl_reg[SPMI_COMMON_IDX_MODE] &=
+                               ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
+                       ctrl_reg[SPMI_COMMON_IDX_MODE] |=
+                               data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
+                       break;
+               default:
+                       break;
+               }
        }
 
        /* Write back any control register values that were modified. */