Switch the alpha target from the old unassigned_access hook
to the new do_transaction_failed hook. This allows us to
resolve a ??? in the old hook implementation.
The only part of the alpha target that does physical
memory accesses is reading the page table -- add a
TODO comment there to the effect that we should handle
bus faults on page table walks. (Since the palcode
doesn't actually do anything useful on a bus fault anyway
it's a bit moot for now.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
1502196172-13818-1-git-send-email-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
#ifdef CONFIG_USER_ONLY
cc->handle_mmu_fault = alpha_cpu_handle_mmu_fault;
#else
- cc->do_unassigned_access = alpha_cpu_unassigned_access;
+ cc->do_transaction_failed = alpha_cpu_do_transaction_failed;
cc->do_unaligned_access = alpha_cpu_do_unaligned_access;
cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;
dc->vmsd = &vmstate_alpha_cpu;
uint64_t cpu_alpha_load_gr(CPUAlphaState *env, unsigned reg);
void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg, uint64_t val);
#ifndef CONFIG_USER_ONLY
-QEMU_NORETURN void alpha_cpu_unassigned_access(CPUState *cpu, hwaddr addr,
- bool is_write, bool is_exec,
- int unused, unsigned size);
+void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
+ vaddr addr, unsigned size,
+ MMUAccessType access_type,
+ int mmu_idx, MemTxAttrs attrs,
+ MemTxResult response, uintptr_t retaddr);
#endif
static inline void cpu_get_tb_cpu_state(CPUAlphaState *env, target_ulong *pc,
pt = env->ptbr;
+ /* TODO: rather than using ldq_phys() to read the page table we should
+ * use address_space_ldq() so that we can handle the case when
+ * the page table read gives a bus fault, rather than ignoring it.
+ * For the existing code the zero data that ldq_phys will return for
+ * an access to invalid memory will result in our treating the page
+ * table as invalid, which may even be the right behaviour.
+ */
+
/* L1 page table read. */
index = (addr >> (TARGET_PAGE_BITS + 20)) & 0x3ff;
L1pte = ldq_phys(cs->as, pt + index*8);
cpu_loop_exit(cs);
}
-void alpha_cpu_unassigned_access(CPUState *cs, hwaddr addr,
- bool is_write, bool is_exec, int unused,
- unsigned size)
+void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
+ vaddr addr, unsigned size,
+ MMUAccessType access_type,
+ int mmu_idx, MemTxAttrs attrs,
+ MemTxResult response, uintptr_t retaddr)
{
AlphaCPU *cpu = ALPHA_CPU(cs);
CPUAlphaState *env = &cpu->env;
+ if (retaddr) {
+ cpu_restore_state(cs, retaddr);
+ }
+
env->trap_arg0 = addr;
- env->trap_arg1 = is_write ? 1 : 0;
+ env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0;
cs->exception_index = EXCP_MCHK;
env->error_code = 0;
-
- /* ??? We should cpu_restore_state to the faulting insn, but this hook
- does not have access to the retaddr value from the original helper.
- It's all moot until the QEMU PALcode grows an MCHK handler. */
-
cpu_loop_exit(cs);
}