#ifdef ARCH_X86
/* hope these constant values are cache line aligned */
-uint64_t __attribute__((aligned(8))) mmx_00ffw = 0x00ff00ff00ff00ff;
-uint64_t __attribute__((aligned(8))) mmx_redmask = 0xf8f8f8f8f8f8f8f8;
-uint64_t __attribute__((aligned(8))) mmx_grnmask = 0xfcfcfcfcfcfcfcfc;
+uint64_t __attribute__((aligned(8))) mmx_00ffw = 0x00ff00ff00ff00ffULL;
+uint64_t __attribute__((aligned(8))) mmx_redmask = 0xf8f8f8f8f8f8f8f8ULL;
+uint64_t __attribute__((aligned(8))) mmx_grnmask = 0xfcfcfcfcfcfcfcfcULL;
-uint64_t __attribute__((aligned(8))) M24A= 0x00FF0000FF0000FFLL;
-uint64_t __attribute__((aligned(8))) M24B= 0xFF0000FF0000FF00LL;
-uint64_t __attribute__((aligned(8))) M24C= 0x0000FF0000FF0000LL;
+uint64_t __attribute__((aligned(8))) M24A= 0x00FF0000FF0000FFULL;
+uint64_t __attribute__((aligned(8))) M24B= 0xFF0000FF0000FF00ULL;
+uint64_t __attribute__((aligned(8))) M24C= 0x0000FF0000FF0000ULL;
// the volatile is required because gcc otherwise optimizes some writes away not knowing that these
// are read in the asm block