+++ /dev/null
-; This test case will cause an internal EK_GPRel64BlockAddress to be
-; produced. This was not handled for direct object and an assertion
-; to occur. This is a variation on test case test/CodeGen/Mips/do_switch.ll
-
-; RUN: llc < %s -filetype=obj -march=mips -relocation-model=static
-
-; RUN: llc < %s -filetype=obj -march=mips -relocation-model=pic
-
-; RUN: llc < %s -filetype=obj -march=mips64 -relocation-model=pic -mcpu=mips64 -mattr=n64
-
-define i32 @main() nounwind readnone {
-entry:
- %x = alloca i32, align 4 ; <i32*> [#uses=2]
- store volatile i32 2, i32* %x, align 4
- %0 = load volatile i32* %x, align 4 ; <i32> [#uses=1]
-
- switch i32 %0, label %bb4 [
- i32 0, label %bb5
- i32 1, label %bb1
- i32 2, label %bb2
- i32 3, label %bb3
- ]
-
-bb1: ; preds = %entry
- ret i32 2
-
-bb2: ; preds = %entry
- ret i32 0
-
-bb3: ; preds = %entry
- ret i32 3
-
-bb4: ; preds = %entry
- ret i32 4
-
-bb5: ; preds = %entry
- ret i32 1
-}
-
--- /dev/null
+// This test case will cause an internal EK_GPRel64BlockAddress to be
+// produced. This was not handled for direct object and an assertion
+// to occur. This is a variation on test case test/CodeGen/Mips/do_switch.ll
+
+// RUN: llvm-mc < %s -filetype=obj -triple=mips-pc-linux -relocation-model=static
+
+ .text
+ .abicalls
+ .option pic0
+ .section .mdebug.abi32,"",@progbits
+ .file "/home/espindola/llvm/llvm/test/MC/Mips/do_switch.ll"
+ .text
+ .globl main
+ .align 2
+ .type main,@function
+ .set nomips16
+ .ent main
+main: # @main
+ .frame $sp,8,$ra
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ .set noat
+# BB#0: # %entry
+ addiu $sp, $sp, -8
+ addiu $1, $zero, 2
+ sw $1, 4($sp)
+ lw $2, 4($sp)
+ sltiu $1, $2, 4
+ bnez $1, $BB0_2
+ nop
+$BB0_1: # %bb4
+ addiu $2, $zero, 4
+ jr $ra
+ addiu $sp, $sp, 8
+$BB0_2: # %entry
+ sll $1, $2, 2
+ lui $2, %hi($JTI0_0)
+ addu $1, $1, $2
+ lw $1, %lo($JTI0_0)($1)
+ jr $1
+ nop
+$BB0_3: # %bb5
+ addiu $2, $zero, 1
+ jr $ra
+ addiu $sp, $sp, 8
+$BB0_4: # %bb1
+ addiu $2, $zero, 2
+ jr $ra
+ addiu $sp, $sp, 8
+$BB0_5: # %bb2
+ addiu $2, $zero, 0
+ jr $ra
+ addiu $sp, $sp, 8
+$BB0_6: # %bb3
+ addiu $2, $zero, 3
+ jr $ra
+ addiu $sp, $sp, 8
+ .set at
+ .set macro
+ .set reorder
+ .end main
+$tmp0:
+ .size main, ($tmp0)-main
+ .section .rodata,"a",@progbits
+ .align 2
+$JTI0_0:
+ .4byte ($BB0_3)
+ .4byte ($BB0_4)
+ .4byte ($BB0_5)
+ .4byte ($BB0_6)
+
+
+ .text
--- /dev/null
+// This test case will cause an internal EK_GPRel64BlockAddress to be
+// produced. This was not handled for direct object and an assertion
+// to occur. This is a variation on test case test/CodeGen/Mips/do_switch.ll
+
+// RUN: llvm-mc < %s -filetype=obj -triple=mips-pc-linux -relocation-model=pic
+
+ .text
+ .abicalls
+ .section .mdebug.abi32,"",@progbits
+ .file "/home/espindola/llvm/llvm/test/MC/Mips/do_switch.ll"
+ .text
+ .globl main
+ .align 2
+ .type main,@function
+ .set nomips16
+ .ent main
+main: # @main
+ .frame $sp,8,$ra
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ .set noat
+# BB#0: # %entry
+ lui $2, %hi(_gp_disp)
+ addiu $2, $2, %lo(_gp_disp)
+ addiu $sp, $sp, -8
+ addiu $1, $zero, 2
+ sw $1, 4($sp)
+ lw $3, 4($sp)
+ sltiu $1, $3, 4
+ bnez $1, $BB0_2
+ addu $2, $2, $25
+$BB0_1: # %bb4
+ addiu $2, $zero, 4
+ jr $ra
+ addiu $sp, $sp, 8
+$BB0_2: # %entry
+ sll $1, $3, 2
+ lw $3, %got($JTI0_0)($2)
+ addu $1, $1, $3
+ lw $1, %lo($JTI0_0)($1)
+ addu $1, $1, $2
+ jr $1
+ nop
+$BB0_3: # %bb5
+ addiu $2, $zero, 1
+ jr $ra
+ addiu $sp, $sp, 8
+$BB0_4: # %bb1
+ addiu $2, $zero, 2
+ jr $ra
+ addiu $sp, $sp, 8
+$BB0_5: # %bb2
+ addiu $2, $zero, 0
+ jr $ra
+ addiu $sp, $sp, 8
+$BB0_6: # %bb3
+ addiu $2, $zero, 3
+ jr $ra
+ addiu $sp, $sp, 8
+ .set at
+ .set macro
+ .set reorder
+ .end main
+$tmp0:
+ .size main, ($tmp0)-main
+ .section .rodata,"a",@progbits
+ .align 2
+$JTI0_0:
+ .gpword ($BB0_3)
+ .gpword ($BB0_4)
+ .gpword ($BB0_5)
+ .gpword ($BB0_6)
+
+
+ .text
--- /dev/null
+// This test case will cause an internal EK_GPRel64BlockAddress to be
+// produced. This was not handled for direct object and an assertion
+// to occur. This is a variation on test case test/CodeGen/Mips/do_switch.ll
+
+// RUN: llvm-mc < %s -filetype=obj -triple=mips64-pc-linux -relocation-model=pic -mcpu=mips64 -mattr=n64
+
+ .text
+ .abicalls
+ .section .mdebug.abi64,"",@progbits
+ .file "/home/espindola/llvm/llvm/test/MC/Mips/do_switch.ll"
+ .text
+ .globl main
+ .align 3
+ .type main,@function
+ .set nomips16
+ .ent main
+main: # @main
+ .frame $sp,16,$ra
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ .set noat
+# BB#0: # %entry
+ daddiu $sp, $sp, -16
+ lui $1, %hi(%neg(%gp_rel(main)))
+ daddu $2, $1, $25
+ addiu $1, $zero, 2
+ sw $1, 12($sp)
+ lw $1, 12($sp)
+ sltiu $4, $1, 4
+ dsll $3, $1, 32
+ bnez $4, $BB0_2
+ nop
+$BB0_1: # %bb4
+ addiu $2, $zero, 4
+ jr $ra
+ daddiu $sp, $sp, 16
+$BB0_2: # %entry
+ daddiu $1, $2, %lo(%neg(%gp_rel(main)))
+ dsrl $2, $3, 32
+ daddiu $3, $zero, 8
+ dmult $2, $3
+ mflo $2
+ ld $3, %got_page($JTI0_0)($1)
+ daddu $2, $2, $3
+ ld $2, %got_ofst($JTI0_0)($2)
+ daddu $1, $2, $1
+ jr $1
+ nop
+$BB0_3: # %bb5
+ addiu $2, $zero, 1
+ jr $ra
+ daddiu $sp, $sp, 16
+$BB0_4: # %bb1
+ addiu $2, $zero, 2
+ jr $ra
+ daddiu $sp, $sp, 16
+$BB0_5: # %bb2
+ addiu $2, $zero, 0
+ jr $ra
+ daddiu $sp, $sp, 16
+$BB0_6: # %bb3
+ addiu $2, $zero, 3
+ jr $ra
+ daddiu $sp, $sp, 16
+ .set at
+ .set macro
+ .set reorder
+ .end main
+$tmp0:
+ .size main, ($tmp0)-main
+ .section .rodata,"a",@progbits
+ .align 3
+$JTI0_0:
+// .gpdword ($BB0_3)
+// .gpdword ($BB0_4)
+// .gpdword ($BB0_5)
+// .gpdword ($BB0_6)
+
+
+ .text
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