Fix 4 typos under drivers/media/platform/rockchip/rkisp1/ found by
checkpatch, including the RKISP1_CIF_MI_{M,S}P_PINGPONG_ENABLE macro
definitions.
Signed-off-by: Peilin Ye <yepeilin.cs@gmail.com>
Acked-by: Helen Koike <helen.koike@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
/*
* @fourcc: pixel format
* @fmt_type: helper filed for pixel format
- * @uv_swap: if cb cr swaped, for yuv
+ * @uv_swap: if cb cr swapped, for yuv
* @write_format: defines how YCbCr self picture data is written to memory
* @output_format: defines sp output format
* @mbus: the mbus code on the src resizer pad that matches the pixel format
{
int ret;
- /* Stream should stop in interrupt. If it dosn't, stop it by force. */
+ /* Stream should stop in interrupt. If it doesn't, stop it by force. */
cap->is_stopping = true;
ret = wait_event_timeout(cap->done,
!cap->is_streaming,
#define RKISP1_CIF_MI_SP_Y_FULL_YUV2RGB BIT(8)
#define RKISP1_CIF_MI_SP_CBCR_FULL_YUV2RGB BIT(9)
#define RKISP1_CIF_MI_SP_422NONCOSITEED BIT(10)
-#define RKISP1_CIF_MI_MP_PINGPONG_ENABEL BIT(11)
-#define RKISP1_CIF_MI_SP_PINGPONG_ENABEL BIT(12)
+#define RKISP1_CIF_MI_MP_PINGPONG_ENABLE BIT(11)
+#define RKISP1_CIF_MI_SP_PINGPONG_ENABLE BIT(12)
#define RKISP1_CIF_MI_MP_AUTOUPDATE_ENABLE BIT(13)
#define RKISP1_CIF_MI_SP_AUTOUPDATE_ENABLE BIT(14)
#define RKISP1_CIF_MI_LAST_PIXEL_SIG_ENABLE BIT(15)