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drm/i915: Clean up FPGA_DBG/CLAIM_ER bits
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 12 Nov 2021 19:38:13 +0000 (21:38 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 19 Nov 2021 10:33:06 +0000 (12:33 +0200)
Use REG_BIT() & co. for FPGA_DBG/CLAIM_ER bits.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-10-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/i915/i915_reg.h

index a6dcf25..d9d47ab 100644 (file)
@@ -2798,12 +2798,12 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define GEN12_AUX_ERR_DBG              _MMIO(0x43f4)
 
 #define FPGA_DBG               _MMIO(0x42300)
-#define   FPGA_DBG_RM_NOCLAIM  (1 << 31)
+#define   FPGA_DBG_RM_NOCLAIM  REG_BIT(31)
 
 #define CLAIM_ER               _MMIO(VLV_DISPLAY_BASE + 0x2028)
-#define   CLAIM_ER_CLR         (1 << 31)
-#define   CLAIM_ER_OVERFLOW    (1 << 16)
-#define   CLAIM_ER_CTR_MASK    0xffff
+#define   CLAIM_ER_CLR         REG_BIT(31)
+#define   CLAIM_ER_OVERFLOW    REG_BIT(16)
+#define   CLAIM_ER_CTR_MASK    REG_GENMASK(15, 0)
 
 #define DERRMR         _MMIO(0x44050)
 /* Note that HBLANK events are reserved on bdw+ */