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ASoC: rt1015: modify calibration sequence for better performance
authorJack Yu <jack.yu@realtek.com>
Tue, 22 Dec 2020 03:15:24 +0000 (03:15 +0000)
committerMark Brown <broonie@kernel.org>
Mon, 28 Dec 2020 12:24:44 +0000 (12:24 +0000)
New calibration sequence to fix power issue in idle state.

Signed-off-by: Jack Yu <jack.yu@realtek.com>
Link: https://lore.kernel.org/r/ec66399502514edbb1de3cf9bff08b1d@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/rt1015.c

index 32e6bcf..5fdf7bb 100644 (file)
@@ -497,40 +497,20 @@ static void rt1015_calibrate(struct rt1015_priv *rt1015)
        snd_soc_dapm_mutex_lock(&component->dapm);
        regcache_cache_bypass(regmap, true);
 
-       regmap_write(regmap, RT1015_PWR9, 0xAA60);
-       regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0089);
-       regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008A);
-       regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008C);
-       regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008D);
-       regmap_write(regmap, RT1015_PWR4, 0x80B2);
-       regmap_write(regmap, RT1015_CLASSD_SEQ, 0x5797);
-       regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2100);
-       regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0100);
-       regmap_write(regmap, RT1015_PWR5, 0x2175);
-       regmap_write(regmap, RT1015_MIXER1, 0x005D);
-       regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x00A1);
-       regmap_write(regmap, RT1015_CLSD_INTERNAL2, 0x12F7);
-       regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x1205);
-       msleep(200);
-       regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2000);
-       regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0180);
-       regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x00A1);
-       regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x0A05);
-       msleep(200);
+       regmap_write(regmap, RT1015_CLK_DET, 0x0000);
        regmap_write(regmap, RT1015_PWR4, 0x00B2);
+       regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0009);
+       msleep(100);
+       regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000A);
+       msleep(100);
+       regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000C);
+       msleep(100);
        regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2028);
        regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0140);
-       regmap_write(regmap, RT1015_PWR5, 0x0175);
-       regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x1721);
-       regmap_write(regmap, RT1015_CLASSD_SEQ, 0x570E);
-       regmap_write(regmap, RT1015_MIXER1, 0x203D);
-       regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x5A01);
-       regmap_write(regmap, RT1015_CLSD_INTERNAL2, 0x12FF);
-       regmap_write(regmap, RT1015_GAT_BOOST, 0x0eFE);
-       regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008E);
-       regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0088);
+       regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000D);
+       msleep(300);
+       regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0008);
        regmap_write(regmap, RT1015_SYS_RST1, 0x05F5);
-       regmap_write(regmap, RT1015_SYS_RST2, 0x0b9a);
 
        regcache_cache_bypass(regmap, false);
        regcache_mark_dirty(regmap);