scsi: mpt3sas: Add support for Aero controllers

Add support for Aero/Sea controllers and add warning for configurable
secure type IOC.

Signed-off-by: Suganath Prabu <suganath-prabu.subramani@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
index 03c5284..843b53e 100644 (file)
--- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c
+++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
@@ -10250,6 +10250,10 @@ _scsih_determine_hba_mpi_version(struct pci_dev *pdev)
        case MPI26_MFGPAGE_DEVID_SAS3516_1:
        case MPI26_MFGPAGE_DEVID_SAS3416:
        case MPI26_MFGPAGE_DEVID_SAS3616:
+       case MPI26_MFGPAGE_DEVID_CFG_SEC_3916:
+       case MPI26_MFGPAGE_DEVID_HARD_SEC_3916:
+       case MPI26_MFGPAGE_DEVID_CFG_SEC_3816:
+       case MPI26_MFGPAGE_DEVID_HARD_SEC_3816:
                return MPI26_VERSION;
        }
        return 0;
@@ -10335,6 +10339,11 @@ _scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id)
                case MPI26_MFGPAGE_DEVID_SAS3516_1:
                case MPI26_MFGPAGE_DEVID_SAS3416:
                case MPI26_MFGPAGE_DEVID_SAS3616:
+               case MPI26_MFGPAGE_DEVID_CFG_SEC_3816:
+               case MPI26_MFGPAGE_DEVID_CFG_SEC_3916:
+                       ioc_warn(ioc, "HBA is in Configurable Secure mode\n");
+               case MPI26_MFGPAGE_DEVID_HARD_SEC_3816:
+               case MPI26_MFGPAGE_DEVID_HARD_SEC_3916:
                        ioc->is_gen35_ioc = 1;
                        break;
                default:
@@ -10795,6 +10804,23 @@ static const struct pci_device_id mpt3sas_pci_table[] = {
        /* Mercator ~ 3616*/
        { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3616,
                PCI_ANY_ID, PCI_ANY_ID },
+
+       /* Aero SI 0x00E1 Configurable Secure
+        * 0x00E2 Hard Secure
+        */
+       { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_3916,
+               PCI_ANY_ID, PCI_ANY_ID },
+       { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_3916,
+               PCI_ANY_ID, PCI_ANY_ID },
+
+       /* Sea SI 0x00E5 Configurable Secure
+        * 0x00E6 Hard Secure
+        */
+       { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_3816,
+               PCI_ANY_ID, PCI_ANY_ID },
+       { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_3816,
+               PCI_ANY_ID, PCI_ANY_ID },
+
        {0}     /* Terminating entry */
 };
 MODULE_DEVICE_TABLE(pci, mpt3sas_pci_table);