* rs6000/Makefile.in: Add xilinx support.
* rs6000/xil-crt0.s: New crt0 file for powerpc-xilinx-eabi.
* rs6000/xilinx.ld: New file.
* rs6000/xilinx440.ld: Ditto.
+2009-06-17 Michael Eager <eager@eagercon.com>
+
+ * rs6000/Makefile.in: Add xilinx support.
+ * rs6000/xil-crt0.s: New crt0 file for powerpc-xilinx-eabi.
+ * rs6000/xilinx.ld: New file.
+ * rs6000/xilinx440.ld: Ditto.
+
2009-05-13 Ken Werner <ken.werner@de.ibm.com>
* configure.in: Introduce config_libnosys flag which defaults to true.
MBX_TEST = mbx-test
MBX_INSTALL = install-mbx
+XIL_SCRIPTS = xilinx.ld xilinx440.ld
+XIL_SPECS =
+XIL_CRT0 = xil-crt0.o xil-pgcrt0.o xil-sim-crt0.o xil-sim-pgcrt0.o
+XIL_BSP = libxil.a
+XIL_OBJS = open.o close.o lseek.o sbrk.o read.o write.o print.o xil-exit.o
+XIL_TEST = xil-test
+XIL_INSTALL = install-xil
+
# Host specific makefile fragment comes in here.
@host_makefile_frag@
${LINUX_CRT0} ${LINUX_BSP} \
${YELLOWKNIFE_CRT0} ${YELLOWKNIFE_BSP} \
${ADS_CRT0} ${ADS_BSP} \
- ${MBX_CRT0} ${MBX_BSP}
+ ${MBX_CRT0} ${MBX_BSP} \
+ ${XIL_CRT0} ${XIL_BSP}
#
# here's where we build the board support packages for each target
${AR} ${ARFLAGS} $@ ${MBX_OBJS} ${OBJS}
${RANLIB} $@
+${XIL_BSP}: ${OBJS} ${XIL_OBJS}
+ ${AR} ${ARFLAGS} $@ ${XIL_OBJS} ${OBJS}
+ ${RANLIB} $@
+
#
# here's where we build the test programs for each target
#
.PHONY: test
-test: ${SIM_TEST} ${MVME_TEST} ${YELLOWKNIFE_TEST} ${ADS_TEST} ${MBX_TEST}
+test: ${SIM_TEST} ${MVME_TEST} ${YELLOWKNIFE_TEST} ${ADS_TEST} ${MBX_TEST} ${XIL_TEST}
sim-test: sim-test.x sim-test.dis
mbx-test.srec: mbx-test.x
${OBJCOPY} -O srec mbx-test.x mbx-test.srec
+xil-test: xil-test.x xil-test.dis xil-test.srec
+
+xil-test.x: test.o ${XIL_CRT0} ${XIL_BSP}
+ ${CC} ${LDFLAGS_FOR_TARGET} -L${objdir} \
+ -T${srcdir}/xilinx.ld ${XIL_CRT0} test.o \
+ -o xil-test.x $(LIBS_FOR_TARGET) ${XIL_BSP} -lc ${XIL_BSP}
+
+xil-test.dis: xil-test.x
+ ${OBJDUMP} -d xil-test.x > xil-test.dis
+
+xil-test.srec: xil-test.x
+ ${OBJCOPY} -O srec xil-test.x xil-test.srec
+
#
#
#
mbx-outbyte.o: mbx-outbyte.c
mbx-print.o: mbx-print.c
+xil-exit.o: xil-exit.c
+
+xil-crt0.o: xil-crt0.S
+ ${CC} -c -o $@ $<
+
+xil-pgcrt0.o: xil-crt0.S
+ ${CC} -c -DPROFILING -o $@ $<
+
+xil-sim-crt0.o: xil-crt0.S
+ ${CC} -c -DSIMULATOR -o $@ $<
+
+xil-sim-pgcrt0.o: xil-crt0.S
+ ${CC} -c -DSIMULATOR -DPROFILING -o $@ $<
+
sol-cfuncs.o: sol-cfuncs.c
sol-syscall.o: sol-syscall.S
rm -f Makefile config.status *~
.PHONY: install info install-info clean-info
-install: ${SIM_INSTALL} ${MVME_INSTALL} ${SOLARIS_INSTALL} ${LINUX_INSTALL} ${YELLOWKNIFE_INSTALL} ${ADS_INSTALL} ${MBX_INSTALL}
+install: ${SIM_INSTALL} ${MVME_INSTALL} ${SOLARIS_INSTALL} ${LINUX_INSTALL} ${YELLOWKNIFE_INSTALL} ${ADS_INSTALL} ${MBX_INSTALL} ${XIL_INSTALL}
install-sim:
set -e; for x in ${SIM_CRT0} ${SIM_BSP} ${SIM_SCRIPTS}; do ${INSTALL_DATA} $$x $(DESTDIR)${tooldir}/lib${MULTISUBDIR}/$$x; done
set -e; for x in ${MBX_CRT0} ${MBX_BSP}; do ${INSTALL_DATA} $$x $(DESTDIR)${tooldir}/lib${MULTISUBDIR}/$$x; done
set -e; for x in ${MBX_SCRIPTS} ${MBX_SPECS}; do ${INSTALL_DATA} $(srcdir)/$$x $(DESTDIR)${tooldir}/lib${MULTISUBDIR}/$$x; done
+install-xil:
+ set -e; for x in ${XIL_CRT0} ${XIL_BSP}; do ${INSTALL_DATA} $$x $(DESTDIR)${tooldir}/lib/$$x; done
+ set -e; for x in ${XIL_SCRIPTS} ${XIL_SPECS}; do ${INSTALL_DATA} $(srcdir)/$$x $(DESTDIR)${tooldir}/lib/$$x; done
+
doc:
info:
install-info:
--- /dev/null
+/*-----------------------------------------------------------------------------
+//
+// Copyright (c) 2004, 2009 Xilinx, Inc. All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+// 1. Redistributions source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// 3. Neither the name of Xilinx nor the names of its contributors may be
+// used to endorse or promote products derived from this software without
+// specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
+// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+//---------------------------------------------------------------------------*/
+
+ .file "xil-crt0.S"
+ .section ".got2","aw"
+ .align 2
+
+.LCTOC1 = . + 32768
+
+.Lsbss_start = .-.LCTOC1
+ .long __sbss_start
+
+.Lsbss_end = .-.LCTOC1
+ .long __sbss_end
+
+.Lbss_start = .-.LCTOC1
+ .long __bss_start
+
+.Lbss_end = .-.LCTOC1
+ .long __bss_end
+
+.Lstack = .-.LCTOC1
+ .long __stack
+
+.Lsda = .-.LCTOC1
+ .long _SDA_BASE_ /* address of the first small data area */
+
+.Lsda2 = .-.LCTOC1
+ .long _SDA2_BASE_ /* address of the second small data area */
+
+
+ .text
+ .globl _start
+_start:
+ bl __cpu_init /* Initialize the CPU first (BSP provides this) */
+
+ lis 5,.LCTOC1@h
+ ori 5,5,.LCTOC1@l
+
+ lwz 13,.Lsda(5) /* load r13 with _SDA_BASE_ address */
+ lwz 2,.Lsda2(5) /* load r2 with _SDA2_BASE_ address */
+
+#ifndef SIMULATOR
+ /* clear sbss */
+ lwz 6,.Lsbss_start(5) /* calculate beginning of the SBSS */
+ lwz 7,.Lsbss_end(5) /* calculate end of the SBSS */
+
+ cmplw 1,6,7
+ bc 4,4,.Lenclsbss /* If no SBSS, no clearing required */
+
+ li 0,0 /* zero to clear memory */
+ subf 8,6,7 /* number of bytes to zero */
+ srwi. 9,8,2 /* number of words to zero */
+ beq .Lstbyteloopsbss /* Check if the number of bytes was less than 4 */
+ mtctr 9
+ addi 6,6,-4 /* adjust so we can use stwu */
+.Lloopsbss:
+ stwu 0,4(6) /* zero sbss */
+ bdnz .Lloopsbss
+
+.Lstbyteloopsbss:
+ andi. 9,8,3 /* Calculate how many trailing bytes we have */
+ beq 0,.Lenclsbss
+ mtctr 9
+ addi 6,6,-1 /* adjust, so we can use stbu */
+
+.Lbyteloopsbss:
+ stbu 0,1(6)
+ bdnz .Lbyteloopsbss
+
+.Lenclsbss:
+.Lstclbss:
+
+ /* clear bss */
+ lwz 6,.Lbss_start(5) /* calculate beginning of the BSS */
+ lwz 7,.Lbss_end(5) /* calculate end of the BSS */
+
+ cmplw 1,6,7
+ bc 4,4,.Lenclbss /* If no BSS, no clearing required */
+
+ li 0,0 /* zero to clear memory */
+ subf 8,6,7 /* number of bytes to zero */
+ srwi. 9,8,2 /* number of words to zero */
+ beq .Lstbyteloopbss /* Check if the number of bytes was less than 4 */
+ mtctr 9
+ addi 6,6,-4 /* adjust so we can use stwu */
+.Lloopbss:
+ stwu 0,4(6) /* zero bss */
+ bdnz .Lloopbss
+
+.Lstbyteloopbss:
+ andi. 9,8,3 /* Calculate how many trailing bytes we have */
+ beq 0,.Lenclbss /* If zero, we are done */
+ mtctr 9
+ addi 6,6,-1 /* adjust, so we can use stbu */
+
+.Lbyteloopbss:
+ stbu 0,1(6)
+ bdnz .Lbyteloopbss
+
+.Lenclbss:
+#endif /* SIMULATOR */
+
+ /* set stack pointer */
+ lwz 1,.Lstack(5) /* stack address */
+
+ /* set up initial stack frame */
+ addi 1,1,-8 /* location of back chain */
+ lis 0,0
+ stw 0,0(1) /* set end of back chain */
+
+ /* initialize base timer to zero */
+ mtspr 0x11c,0
+ mtspr 0x11d,0
+
+#ifdef HAVE_XFPU
+ /* On the Xilinx PPC405 and PPC440, the MSR
+ must be explicitly set to mark the prescence
+ of an FPU */
+ mfpvr 0
+ rlwinm 0,0,0,12,15
+ cmpwi 7,0,8192
+ mfmsr 0
+ ori 0,0,8192
+ beq- 7,fpu_init_done
+do_405:
+ oris 0,0,512
+fpu_init_done:
+ mtmsr 0
+#endif
+
+#ifdef PROFILING
+ /* Setup profiling stuff */
+ bl _profile_init
+#endif /* PROFILING */
+
+ /* Call __init */
+ bl __init
+
+ /* Let her rip */
+ bl main
+
+ /* Invoke the language cleanup functions */
+ bl __fini
+
+#ifdef PROFILING
+ /* Cleanup profiling stuff */
+ bl _profile_clean
+#endif /* PROFILING */
+
+ /* Call __init */
+ /* All done */
+ bl exit
+
+/* Trap has been removed for both simulation and hardware */
+ .globl _exit
+_exit:
+ b _exit
+
+.Lstart:
+ .size _start,.Lstart-_start
+
--- /dev/null
+/* Default linker script, for normal executables
+
+Copyright (c) 2008, 2009 Xilinx, Inc. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+1. Redistributions source code must retain the above copyright notice,
+this list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in the
+documentation and/or other materials provided with the distribution.
+
+3. Neither the name of Xilinx nor the names of its contributors may be
+used to endorse or promote products derived from this software without
+specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
+ "elf32-powerpc")
+OUTPUT_ARCH(powerpc:common)
+ENTRY(_boot)
+_START_ADDR = DEFINED(_START_ADDR) ? _START_ADDR : 0xFFFF0000;
+_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 4k;
+_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 4k;
+STARTUP(boot.o)
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+PROVIDE (__stack = 0); PROVIDE (___stack = 0);
+SECTIONS
+{
+
+ . = _START_ADDR;
+ .vectors BLOCK (64k):
+ {
+ *(.vectors)
+ }
+ /* Read-only sections, merged into text segment: */
+ .hash : { *(.hash) }
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+ .rela.text :
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+ }
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+ .rela.fini : { *(.rela.fini) }
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+ *(.text)
+ *(.text.*)
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.gnu.linkonce.t.*)
+ } =0
+ .init : { KEEP (*(.init)) } =0
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+ the same address within the page on the next page up. It would
+ be more correct to do this:
+ . = ALIGN(0x08) + (ALIGN(8) & (0x08 - 1));
+ The current expression does not correctly handle the case of a
+ text segment ending precisely at the end of a page; it causes the
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+ this problem, but it will currently (2/95) cause BFD to allocate
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+ This will prevent the text segment from being shared among
+ multiple executions of the program; I think that is more
+ important than losing a page of the virtual address space (note
+ that no actual memory is lost; the page which is skipped can not
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+/* . = ALIGN(8) + 0x08;*/
+ .data :
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+ CONSTRUCTORS
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+ /* Put .ctors and .dtors next to the .got2 section, so that the pointers
+ get relocated with -mrelocatable. Also put in the .fixup pointers.
+ The current compiler no longer needs this, but keep it around for 2.7.2 */
+ PROVIDE (_GOT2_START_ = .);
+ PROVIDE (__GOT2_START_ = .);
+ .got2 : { *(.got2) }
+ PROVIDE (__CTOR_LIST__ = .);
+ PROVIDE (___CTOR_LIST__ = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ }
+ PROVIDE (__CTOR_END__ = .);
+ PROVIDE (___CTOR_END__ = .);
+ PROVIDE (__DTOR_LIST__ = .);
+ PROVIDE (___DTOR_LIST__ = .);
+ .dtors :
+ {
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ }
+ PROVIDE (__DTOR_END__ = .);
+ PROVIDE (___DTOR_END__ = .);
+ PROVIDE (_FIXUP_START_ = .);
+ PROVIDE (__FIXUP_START_ = .);
+ .fixup : { *(.fixup) }
+ PROVIDE (_FIXUP_END_ = .);
+ PROVIDE (__FIXUP_END_ = .);
+ PROVIDE (_GOT2_END_ = .);
+ PROVIDE (__GOT2_END_ = .);
+ PROVIDE (_GOT_START_ = .);
+ PROVIDE (__GOT_START_ = .);
+ .got : { *(.got) }
+ .got.plt : { *(.got.plt) }
+ PROVIDE (_GOT_END_ = .);
+ PROVIDE (__GOT_END_ = .);
+ /* Added by Sathya to handle C++ exceptions */
+ .eh_frame : {
+ *(.eh_frame)
+ }
+ .jcr : {
+ *(.jcr)
+ }
+ .gcc_except_table : {
+ *(.gcc_except_table)
+ }
+ /* We want the small data sections together, so single-instruction offsets
+ can access them all, and initialized data all before uninitialized, so
+ we can shorten the on-disk segment size. */
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+ PROVIDE (edata = .);
+ PROVIDE (__edata = .);
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+ ___sbss_start = .;
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+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ *(.scommon)
+ *(.dynsbss)
+ __sbss_end = .;
+ ___sbss_end = .;
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+ {
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+ ___bss_start = .;
+ *(.dynbss)
+ *(.bss)
+ *(.bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end = .;
+ }
+
+ .stack :
+ {
+ _stack_end = .;
+ . = . + _STACK_SIZE;
+ . = ALIGN(16);
+ __stack = .;
+ }
+
+ .heap :
+ {
+ _heap_start = .;
+ . = . + _HEAP_SIZE;
+ . = ALIGN(16);
+ _heap_end = .;
+ }
+
+ .tdata : {
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+ *(.tdata.*)
+ *(.gnu.linkonce.td.*)
+ }
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+ *(.gnu.linkonce.tb.*)
+ }
+ /* Check to see if boot0 is going to be within 24bits from boot */
+ /* If so, then leave the location counter as is. */
+ /* If not, then make location counter to be 0x20 locations above boot location */
+ /* This assumes that a BRAM is present for boot and hence 0x20 locations above it are valid */
+ /* This fixes CR 183394 */
+ __boot0_flag__ = ((. > 0x00ffffff) && (. < 0xff000000)) ? 1 : 0;
+ . = (__boot0_flag__) ? 0xffffffdc : .;
+ .boot0 : { *(.boot0)}
+ _end = . ;
+ end = .;
+ __end = .;
+ .boot 0xFFFFFFFC : { *(.boot) }
+ /* These are needed for ELF backends which have not yet been
+ converted to the new style linker. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
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+ /* DWARF 2 */
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+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
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+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ /* These must appear regardless of . */
+}
--- /dev/null
+/* Default linker script for PowerPC 440, for normal executables
+
+Copyright (c) 2008, 2009 Xilinx, Inc. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+1. Redistributions source code must retain the above copyright notice,
+this list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in the
+documentation and/or other materials provided with the distribution.
+
+3. Neither the name of Xilinx nor the names of its contributors may be
+used to endorse or promote products derived from this software without
+specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
+ "elf32-powerpc")
+OUTPUT_ARCH(powerpc:common)
+ENTRY(_boot)
+_START_ADDR = DEFINED(_START_ADDR) ? _START_ADDR : 0xFFFF0000;
+_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 4k;
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+SECTIONS
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+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.gnu.linkonce.t.*)
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+ .fini : { KEEP (*(.fini)) } =0
+ .rodata :
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+ This will prevent the text segment from being shared among
+ multiple executions of the program; I think that is more
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+ The current compiler no longer needs this, but keep it around for 2.7.2 */
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+ PROVIDE (__GOT2_START_ = .);
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+ PROVIDE (__CTOR_LIST__ = .);
+ PROVIDE (___CTOR_LIST__ = .);
+ .ctors :
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+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
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+ is in. */
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+ The .ctor section from the crtend file contains the
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+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ }
+ PROVIDE (__CTOR_END__ = .);
+ PROVIDE (___CTOR_END__ = .);
+ PROVIDE (__DTOR_LIST__ = .);
+ PROVIDE (___DTOR_LIST__ = .);
+ .dtors :
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+ KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ }
+ PROVIDE (__DTOR_END__ = .);
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+ PROVIDE (_FIXUP_START_ = .);
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+ PROVIDE (_FIXUP_END_ = .);
+ PROVIDE (__FIXUP_END_ = .);
+ PROVIDE (_GOT2_END_ = .);
+ PROVIDE (__GOT2_END_ = .);
+ PROVIDE (_GOT_START_ = .);
+ PROVIDE (__GOT_START_ = .);
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+ .got.plt : { *(.got.plt) }
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+ }
+ .jcr : {
+ *(.jcr)
+ }
+ .gcc_except_table : {
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+ PROVIDE (edata = .);
+ PROVIDE (__edata = .);
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+ *(.scommon)
+ *(.dynsbss)
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+ ___bss_start = .;
+ *(.dynbss)
+ *(.bss)
+ *(.bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end = .;
+ }
+
+ .stack :
+ {
+ _stack_end = .;
+ . = . + _STACK_SIZE;
+ . = ALIGN(16);
+ __stack = .;
+ }
+
+ .heap :
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+ . = . + _HEAP_SIZE;
+ . = ALIGN(16);
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+ }
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+ *(.tdata.*)
+ *(.gnu.linkonce.td.*)
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+ }
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+ _end = . ;
+ end = .;
+ __end = .;
+
+ .boot0 0xFFFFFF00 : { *(.boot0)}
+
+ .boot 0xFFFFFFFC : { *(.boot) }
+
+ /* These are needed for ELF backends which have not yet been
+ converted to the new style linker. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
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+ /* These must appear regardless of . */
+}