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pinctrl: qcom: spmi-gpio: Update GPIO EN_CTL when setting pin config
authorFenglin Wu <fenglinw@codeaurora.org>
Tue, 12 Sep 2017 00:32:46 +0000 (08:32 +0800)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 11 Oct 2017 08:23:35 +0000 (10:23 +0200)
GPIO is expected to be disabled iff PIN_CONFIG_BIAS_HIGH_IMPEDANCE is
configured. Update is_enabled flag in config_set() so that it can
reflect GPIO status correctly. Also modify EN_CTL register based on
is_enabled flag in config_set() to configure the GPIO properly.

Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/qcom/pinctrl-spmi-gpio.c

index c2c0bab..a0edaa8 100644 (file)
@@ -453,6 +453,7 @@ static int pmic_gpio_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
 
        pad = pctldev->desc->pins[pin].drv_data;
 
+       pad->is_enabled = true;
        for (i = 0; i < nconfs; i++) {
                param = pinconf_to_config_param(configs[i]);
                arg = pinconf_to_config_argument(configs[i]);
@@ -600,6 +601,10 @@ static int pmic_gpio_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
                        return ret;
        }
 
+       val = pad->is_enabled << PMIC_GPIO_REG_MASTER_EN_SHIFT;
+
+       ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_EN_CTL, val);
+
        return ret;
 }