drm/i915/dsi: Do not read the transcoder register.

As per the Bspec, port mapping is fixed for mipi dsi.

v2: Reuse the existing function (Jani)

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191119072004.4093-1-vandita.kulkarni@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1558aef..a7e55c9 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10577,16 +10577,21 @@ static void haswell_get_ddi_port_state(struct intel_crtc *crtc,
                                       struct intel_crtc_state *pipe_config)
 {
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+       enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
        struct intel_shared_dpll *pll;
        enum port port;
        u32 tmp;
 
-       tmp = I915_READ(TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder));
-
-       if (INTEL_GEN(dev_priv) >= 12)
-               port = TGL_TRANS_DDI_FUNC_CTL_VAL_TO_PORT(tmp);
-       else
-               port = TRANS_DDI_FUNC_CTL_VAL_TO_PORT(tmp);
+       if (transcoder_is_dsi(cpu_transcoder)) {
+               port = (cpu_transcoder == TRANSCODER_DSI_A) ?
+                                               PORT_A : PORT_B;
+       } else {
+               tmp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
+               if (INTEL_GEN(dev_priv) >= 12)
+                       port = TGL_TRANS_DDI_FUNC_CTL_VAL_TO_PORT(tmp);
+               else
+                       port = TRANS_DDI_FUNC_CTL_VAL_TO_PORT(tmp);
+       }
 
        if (INTEL_GEN(dev_priv) >= 11)
                icelake_get_ddi_pll(dev_priv, port, pipe_config);