order as the clocks property.
Current values of clock-names are:
"src_clk", "core_clk", "iface_clk", "mem_clk", "mem_iface_clk",
- "alt_mem_iface_clk", "rbbmtimer_clk", "alwayson_clk"
+ "alt_mem_iface_clk", "rbbmtimer_clk", "alwayson_clk",
+ "iref_clk"
"core_clk" and "iface_clk" are required and others are optional
- qcom,base-leakage-coefficient: Dynamic leakage coefficient.
<&clock_gcc clk_gcc_bimc_gfx_clk>,
<&clock_gcc clk_gcc_gpu_bimc_gfx_clk>,
<&clock_gpu clk_gpucc_gfx3d_isense_clk>,
- <&clock_gpu clk_gpucc_rbcpr_clk>;
+ <&clock_gpu clk_gpucc_rbcpr_clk>,
+ <&clock_gcc clk_gcc_gpu_iref_clk>;
clock-names = "core_clk", "iface_clk", "rbbmtimer_clk",
- "mem_clk", "mem_iface_clk", "isense_clk", "rbcpr_clk";
+ "mem_clk", "mem_iface_clk", "isense_clk", "rbcpr_clk",
+ "iref_clk";
/* Bus Scale Settings */
qcom,gpubw-dev = <&gpubw>;
#define KGSL_PWR_ON 0xFFFF
-#define KGSL_MAX_CLKS 13
+#define KGSL_MAX_CLKS 14
#define KGSL_MAX_REGULATORS 2
#define KGSL_MAX_PWRLEVELS 10