drm/i915/ehl: Remove unsupported cd clocks

EHL do not support 648 and 652.8 MHz.

v2:
- Limiting maximum CD clock by max_cdclk_freq instead of remove it
from icl_calc_cdclk()(Ville and Jani)

BSpec: 20598
Cc: Clint Taylor <Clinton.A.Taylor@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190626014053.30541-2-jose.souza@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index c8ebd31..0dda644 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -2606,7 +2606,12 @@ static int intel_compute_max_dotclk(struct drm_i915_private *dev_priv)
  */
 void intel_update_max_cdclk(struct drm_i915_private *dev_priv)
 {
-       if (INTEL_GEN(dev_priv) >= 11) {
+       if (IS_ELKHARTLAKE(dev_priv)) {
+               if (dev_priv->cdclk.hw.ref == 24000)
+                       dev_priv->max_cdclk_freq = 552000;
+               else
+                       dev_priv->max_cdclk_freq = 556800;
+       } else if (INTEL_GEN(dev_priv) >= 11) {
                if (dev_priv->cdclk.hw.ref == 24000)
                        dev_priv->max_cdclk_freq = 648000;
                else