input: qpnp-power-on: Configure debounce delay for PON GEN2 properly

Debounce delay range and hence the bit encodings got changed in
PON GEN2 peripheral. Fix qpnp_pon_set_dbc() to configure the
debounce delay properly.

CRs-Fixed: 1097089
Change-Id: Ia3d474a04e11c7d16a1507d65e99001cf844947b
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/input/qpnp-power-on.txt b/Documentation/devicetree/bindings/input/qpnp-power-on.txt
index 5b364d0..a596aa1 100644 (file)
--- a/Documentation/devicetree/bindings/input/qpnp-power-on.txt
+++ b/Documentation/devicetree/bindings/input/qpnp-power-on.txt
@@ -24,11 +24,14 @@ Required properties:
 
 Optional properties:
 - qcom,pon-dbc-delay           The debounce delay for the power-key interrupt
-                               specified in us. The value ranges from 2
-                               seconds to 1/64 of a second. Possible values
-                               are:
-                               - 2, 1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64
-                               - Intermediate value is rounded down to the
+                               specified in us.
+                               Possible values for GEN1 PON are:
+                               15625, 31250, 62500, 125000, 250000, 500000,
+                               1000000 and 2000000.
+                               Possible values for GEN2 PON are:
+                               62, 123, 245, 489, 977, 1954, 3907, 7813,
+                               15625, 31250, 62500, 125000 and 250000.
+                               Intermediate value is rounded down to the
                                nearest valid value.
 - qcom,pon_1 ...pon_n          These represent the child nodes which describe
                                the properties (reset, key) for each of the pon

diff --git a/drivers/input/qpnp-power-on.c b/drivers/input/qpnp-power-on.c
index 693821d..b9fe20c 100644 (file)
--- a/drivers/input/qpnp-power-on.c
+++ b/drivers/input/qpnp-power-on.c
@@ -104,6 +104,7 @@
 #define QPNP_PON_S2_CNTL_EN                    BIT(7)
 #define QPNP_PON_S2_RESET_ENABLE               BIT(7)
 #define QPNP_PON_DELAY_BIT_SHIFT               6
+#define QPNP_PON_GEN2_DELAY_BIT_SHIFT          14
 
 #define QPNP_PON_S1_TIMER_MASK                 (0xF)
 #define QPNP_PON_S2_TIMER_MASK                 (0x7)
@@ -144,6 +145,8 @@
 #define PON_S1_COUNT_MAX                       0xF
 #define QPNP_PON_MIN_DBC_US                    (USEC_PER_SEC / 64)
 #define QPNP_PON_MAX_DBC_US                    (USEC_PER_SEC * 2)
+#define QPNP_PON_GEN2_MIN_DBC_US               62
+#define QPNP_PON_GEN2_MAX_DBC_US               (USEC_PER_SEC / 4)
 
 #define QPNP_KEY_STATUS_DELAY                  msecs_to_jiffies(250)
 
@@ -370,23 +373,31 @@ EXPORT_SYMBOL(qpnp_pon_check_hard_reset_stored);
 static int qpnp_pon_set_dbc(struct qpnp_pon *pon, u32 delay)
 {
        int rc = 0;
-       u32 delay_reg;
+       u32 val;
 
        if (delay == pon->dbc)
                goto out;
+
        if (pon->pon_input)
                mutex_lock(&pon->pon_input->mutex);
 
-       if (delay < QPNP_PON_MIN_DBC_US)
-               delay = QPNP_PON_MIN_DBC_US;
-       else if (delay > QPNP_PON_MAX_DBC_US)
-               delay = QPNP_PON_MAX_DBC_US;
+       if (is_pon_gen2(pon)) {
+               if (delay < QPNP_PON_GEN2_MIN_DBC_US)
+                       delay = QPNP_PON_GEN2_MIN_DBC_US;
+               else if (delay > QPNP_PON_GEN2_MAX_DBC_US)
+                       delay = QPNP_PON_GEN2_MAX_DBC_US;
+               val = (delay << QPNP_PON_GEN2_DELAY_BIT_SHIFT) / USEC_PER_SEC;
+       } else {
+               if (delay < QPNP_PON_MIN_DBC_US)
+                       delay = QPNP_PON_MIN_DBC_US;
+               else if (delay > QPNP_PON_MAX_DBC_US)
+                       delay = QPNP_PON_MAX_DBC_US;
+               val = (delay << QPNP_PON_DELAY_BIT_SHIFT) / USEC_PER_SEC;
+       }
 
-       delay_reg = (delay << QPNP_PON_DELAY_BIT_SHIFT) / USEC_PER_SEC;
-       delay_reg = ilog2(delay_reg);
+       val = ilog2(val);
        rc = qpnp_pon_masked_write(pon, QPNP_PON_DBC_CTL(pon),
-                                       QPNP_PON_DBC_DELAY_MASK(pon),
-                                       delay_reg);
+                                       QPNP_PON_DBC_DELAY_MASK(pon), val);
        if (rc) {
                dev_err(&pon->pdev->dev, "Unable to set PON debounce\n");
                goto unlock;
@@ -2195,8 +2206,7 @@ static int qpnp_pon_probe(struct platform_device *pdev)
        if (rc) {
                if (rc != -EINVAL) {
                        dev_err(&pdev->dev,
-                               "Unable to read debounce delay rc: %d\n",
-                               rc);
+                               "Unable to read debounce delay rc: %d\n", rc);
                        return rc;
                }
        } else {