KVM: arm64: selftests: Remove the hard-coded {b,w}pn#0 from debug-exceptions

Remove the hard-coded {break,watch}point #0 from the guest_code() in
debug-exceptions to allow {break,watch}point number to be specified.
Change reset_debug_state() to zeroing all dbg{b,w}{c,v}r_el0 registers
so that guest_code() can use the function to reset those registers
even when non-zero {break,watch}points are specified for guest_code().
Subsequent patches will add test cases for non-zero {break,watch}points.

Signed-off-by: Reiji Watanabe <reijiw@google.com>
Reviewed-by: Ricardo Koller <ricarkol@google.com>
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221020054202.2119018-4-reijiw@google.com

diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
index d988490..608a6c8 100644 (file)
--- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
+++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
@@ -95,6 +95,9 @@ GEN_DEBUG_WRITE_REG(dbgwvr)
 
 static void reset_debug_state(void)
 {
+       uint8_t brps, wrps, i;
+       uint64_t dfr0;
+
        asm volatile("msr daifset, #8");
 
        write_sysreg(0, osdlr_el1);
@@ -102,11 +105,20 @@ static void reset_debug_state(void)
        isb();
 
        write_sysreg(0, mdscr_el1);
-       /* This test only uses the first bp and wp slot. */
-       write_sysreg(0, dbgbvr0_el1);
-       write_sysreg(0, dbgbcr0_el1);
-       write_sysreg(0, dbgwcr0_el1);
-       write_sysreg(0, dbgwvr0_el1);
+
+       /* Reset all bcr/bvr/wcr/wvr registers */
+       dfr0 = read_sysreg(id_aa64dfr0_el1);
+       brps = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_BRPS), dfr0);
+       for (i = 0; i <= brps; i++) {
+               write_dbgbcr(i, 0);
+               write_dbgbvr(i, 0);
+       }
+       wrps = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_WRPS), dfr0);
+       for (i = 0; i <= wrps; i++) {
+               write_dbgwcr(i, 0);
+               write_dbgwvr(i, 0);
+       }
+
        isb();
 }
 
@@ -118,14 +130,14 @@ static void enable_os_lock(void)
        GUEST_ASSERT(read_sysreg(oslsr_el1) & 2);
 }
 
-static void install_wp(uint64_t addr)
+static void install_wp(uint8_t wpn, uint64_t addr)
 {
        uint32_t wcr;
        uint32_t mdscr;
 
        wcr = DBGWCR_LEN8 | DBGWCR_RD | DBGWCR_WR | DBGWCR_EL1 | DBGWCR_E;
-       write_dbgwcr(0, wcr);
-       write_dbgwvr(0, addr);
+       write_dbgwcr(wpn, wcr);
+       write_dbgwvr(wpn, addr);
 
        isb();
 
@@ -136,14 +148,14 @@ static void install_wp(uint64_t addr)
        isb();
 }
 
-static void install_hw_bp(uint64_t addr)
+static void install_hw_bp(uint8_t bpn, uint64_t addr)
 {
        uint32_t bcr;
        uint32_t mdscr;
 
        bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E;
-       write_dbgbcr(0, bcr);
-       write_dbgbvr(0, addr);
+       write_dbgbcr(bpn, bcr);
+       write_dbgbvr(bpn, addr);
        isb();
 
        asm volatile("msr daifclr, #8");
@@ -166,7 +178,7 @@ static void install_ss(void)
 
 static volatile char write_data;
 
-static void guest_code(void)
+static void guest_code(uint8_t bpn, uint8_t wpn)
 {
        GUEST_SYNC(0);
 
@@ -179,7 +191,7 @@ static void guest_code(void)
 
        /* Hardware-breakpoint */
        reset_debug_state();
-       install_hw_bp(PC(hw_bp));
+       install_hw_bp(bpn, PC(hw_bp));
        asm volatile("hw_bp: nop");
        GUEST_ASSERT_EQ(hw_bp_addr, PC(hw_bp));
 
@@ -187,7 +199,7 @@ static void guest_code(void)
 
        /* Hardware-breakpoint + svc */
        reset_debug_state();
-       install_hw_bp(PC(bp_svc));
+       install_hw_bp(bpn, PC(bp_svc));
        asm volatile("bp_svc: svc #0");
        GUEST_ASSERT_EQ(hw_bp_addr, PC(bp_svc));
        GUEST_ASSERT_EQ(svc_addr, PC(bp_svc) + 4);
@@ -196,7 +208,7 @@ static void guest_code(void)
 
        /* Hardware-breakpoint + software-breakpoint */
        reset_debug_state();
-       install_hw_bp(PC(bp_brk));
+       install_hw_bp(bpn, PC(bp_brk));
        asm volatile("bp_brk: brk #0");
        GUEST_ASSERT_EQ(sw_bp_addr, PC(bp_brk));
        GUEST_ASSERT_EQ(hw_bp_addr, PC(bp_brk));
@@ -205,7 +217,7 @@ static void guest_code(void)
 
        /* Watchpoint */
        reset_debug_state();
-       install_wp(PC(write_data));
+       install_wp(wpn, PC(write_data));
        write_data = 'x';
        GUEST_ASSERT_EQ(write_data, 'x');
        GUEST_ASSERT_EQ(wp_data_addr, PC(write_data));
@@ -239,7 +251,7 @@ static void guest_code(void)
        /* OS Lock blocking hardware-breakpoint */
        reset_debug_state();
        enable_os_lock();
-       install_hw_bp(PC(hw_bp2));
+       install_hw_bp(bpn, PC(hw_bp2));
        hw_bp_addr = 0;
        asm volatile("hw_bp2: nop");
        GUEST_ASSERT_EQ(hw_bp_addr, 0);
@@ -251,7 +263,7 @@ static void guest_code(void)
        enable_os_lock();
        write_data = '\0';
        wp_data_addr = 0;
-       install_wp(PC(write_data));
+       install_wp(wpn, PC(write_data));
        write_data = 'x';
        GUEST_ASSERT_EQ(write_data, 'x');
        GUEST_ASSERT_EQ(wp_data_addr, 0);
@@ -376,6 +388,8 @@ static void test_guest_debug_exceptions(void)
        vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT,
                                ESR_EC_SVC64, guest_svc_handler);
 
+       /* Run tests with breakpoint#0 and watchpoint#0. */
+       vcpu_args_set(vcpu, 2, 0, 0);
        for (stage = 0; stage < 11; stage++) {
                vcpu_run(vcpu);