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[VM][DMA] Add NEW signal, notify to write-changed address.
authorK.Ohta <whatisthis.sowhat@gmail.com>
Wed, 24 Apr 2019 10:02:49 +0000 (19:02 +0900)
committerK.Ohta <whatisthis.sowhat@gmail.com>
Wed, 24 Apr 2019 10:02:49 +0000 (19:02 +0900)
source/src/vm/common_vm/CMakeLists.txt
source/src/vm/device.h
source/src/vm/fm7/hd6844.cpp
source/src/vm/i8237.cpp
source/src/vm/i8237.h
source/src/vm/upd71071.cpp
source/src/vm/upd71071.h
source/src/vm/z80dma.cpp
source/src/vm/z80dma.h

index f3b452c..c7ff2b1 100644 (file)
@@ -1,6 +1,6 @@
 message("* vm/common_vm")
 
-SET(THIS_LIB_VERSION 2.11.1)
+SET(THIS_LIB_VERSION 2.12.0)
 
 #include(cotire)
 set(s_vm_common_vm_srcs
index ed57aed..03c7a37 100644 (file)
 #define MAX_OUTPUT     16
 
 // common signal id
-#define SIG_CPU_IRQ            101
-#define SIG_CPU_FIRQ           102
-#define SIG_CPU_NMI            103
-#define SIG_CPU_BUSREQ         104
-#define SIG_CPU_HALTREQ                105
-#define SIG_CPU_DEBUG          106
+#define SIG_CPU_IRQ                            101
+#define SIG_CPU_FIRQ                   102
+#define SIG_CPU_NMI                            103
+#define SIG_CPU_BUSREQ                 104
+#define SIG_CPU_HALTREQ                        105
+#define SIG_CPU_DEBUG                  106
+#define SIG_CPU_ADDRESS_DIRTY  107
 
 #define SIG_PRINTER_DATA       201
 #define SIG_PRINTER_STROBE     202
@@ -597,7 +598,7 @@ public:
        virtual void notify_intr_ei() {}
        
        // dma
-       virtual void do_dma() {}
+       virtual void do_dma() { }
        
        // cpu
        virtual int run(int clock)
index 341cabd..dc0d1d1 100644 (file)
@@ -355,6 +355,7 @@ void HD6844::do_transfer(int ch)
        }
        if((channel_control[ch] & 0x01) == 0) {
                data_reg[ch] = src[ch]->read_io8(fixed_addr[ch]) & 0xff;
+               // ToDo: Dirty Memory.
                dest[ch]->write_dma_io8((uint32_t)addr_reg[ch] + addr_offset, data_reg[ch]);
        } else {
                data_reg[ch] = dest[ch]->read_dma_io8((uint32_t)addr_reg[ch] + addr_offset) & 0xff;
index 72a3a9d..86d0e8f 100644 (file)
@@ -174,6 +174,7 @@ void I8237::do_dma()
                                        // io -> memory
                                        tmp = read_io(ch);
                                        write_mem(dma[ch].areg | (dma[ch].bankreg << 16), tmp);
+                                       write_signals(&outputs_wrote_mem, dma[ch].areg | (dma[ch].bankreg << 16)); 
                                        break;
                                case 0x08:
                                        // memory -> io
index 4d36054..52df956 100644 (file)
@@ -48,6 +48,7 @@ protected:
                // output tc signals
                outputs_t outputs_tc;
        } dma[4];
+       outputs_t outputs_wrote_mem;
        
        bool low_high;
        uint8_t cmd;
@@ -72,6 +73,7 @@ public:
                        dma[i].bankreg = dma[i].incmask = 0;
                        initialize_output_signals(&dma[i].outputs_tc);
                }
+               initialize_output_signals(&outputs_wrote_mem);
                mode_word = false;
                addr_mask = 0xffffffff;
                d_debugger = NULL;
@@ -141,6 +143,10 @@ public:
        {
                register_output_signal(&dma[3].outputs_tc, device, id, mask);
        }
+       void set_context_wrote_mem(DEVICE* device, int id)
+       {
+               register_output_signal(&outputs_wrote_mem, device, id, 1);
+       }
        void set_mode_word(bool val)
        {
                mode_word = val;
index 6ccdfd0..5478613 100644 (file)
@@ -249,6 +249,7 @@ void UPD71071::do_dma()
                                                // io -> memory
                                                uint32_t val;
                                                val = dma[c].dev->read_dma_io16(0);
+                                               write_signals(&outputs_wrote_mem_word, dma[c].areg);
                                                if(_USE_DEBUGGER) {
                                                        if(d_debugger != NULL && d_debugger->now_device_debugging) {
                                                                d_debugger->write_via_debugger_data16(dma[c].areg, val);
@@ -313,6 +314,7 @@ void UPD71071::do_dma()
                                                // io -> memory
                                                uint32_t val;
                                                val = dma[c].dev->read_dma_io8(0);
+                                               write_signals(&outputs_wrote_mem_byte, dma[c].areg);
                                                if(_USE_DEBUGGER) {
                                                        if(d_debugger != NULL && d_debugger->now_device_debugging) {
                                                                d_debugger->write_via_debugger_data8(dma[c].areg, val);
index b643eda..ddb1938 100644 (file)
@@ -31,6 +31,8 @@ private:
 //#endif
        DEBUGGER *d_debugger;
        outputs_t outputs_tc;
+       outputs_t outputs_wrote_mem_byte;
+       outputs_t outputs_wrote_mem_word;
        
        struct {
                DEVICE* dev;
@@ -66,6 +68,8 @@ public:
                _SINGLE_MODE_DMA = false;
                _USE_DEBUGGER = false;
                initialize_output_signals(&outputs_tc);
+               initialize_output_signals(&outputs_wrote_mem_word);
+               initialize_output_signals(&outputs_wrote_mem_byte);
                set_device_name(_T("uPD71071 DMAC"));
        }
        ~UPD71071() {}
@@ -128,6 +132,11 @@ public:
        {
                register_output_signal(&outputs_tc, device, id, mask);
        }
+       void set_context_wrote_mem(DEVICE* device, int id)
+       {
+               register_output_signal(&outputs_wrote_mem_byte, device, id, 1);
+               register_output_signal(&outputs_wrote_mem_word, device, id, 2);
+       }
 };
 
 #endif
index 186cc2f..eb0c605 100644 (file)
@@ -571,6 +571,7 @@ restart:
 //#ifdef DMA_DEBUG
                                        if(_DMA_DEBUG) this->out_debug_log(_T("RAM[%4x]\n"), addr_b);
 //#endif
+                                       write_signals(&outputs_wrote_mem, addr_b);
                                        write_memory(addr_b, data, &wait_w);
                                } else {
 //#ifdef DMA_DEBUG
@@ -590,6 +591,7 @@ restart:
 //#ifdef DMA_DEBUG
                                        if(_DMA_DEBUG) this->out_debug_log(_T("RAM[%4x]\n"), addr_a);
 //#endif
+                                       write_signals(&outputs_wrote_mem, addr_a);
                                        write_memory(addr_a, data, &wait_w);
                                } else {
 //#ifdef DMA_DEBUG
index 46b6d5e..b8b44a4 100644 (file)
@@ -24,7 +24,7 @@ class Z80DMA : public DEVICE
 private:
        DEVICE *d_mem, *d_io;
        DEBUGGER *d_debugger;
-       
+       outputs_t outputs_wrote_mem;
        typedef union {
                uint16_t m[7][8];
                uint16_t t[6*8+1+1];
@@ -82,6 +82,7 @@ public:
                _SINGLE_MODE_DMA = _DMA_DEBUG = false;
                d_cpu = d_child = NULL;
                d_debugger = NULL;
+               initialize_output_signals(&outputs_wrote_mem);
                set_device_name(_T("Z80 DMA"));
        }
        ~Z80DMA() {}
@@ -139,6 +140,10 @@ public:
        {
                d_debugger = device;
        }
+       void set_context_wrote_mem(DEVICE* device, int id)
+       {
+               register_output_signal(&outputs_wrote_mem, device, id, 1);
+       }
 };
 
 #endif