OSDN Git Service

x86/fpu/xstate: Prepare XSAVE feature table for gaps in state component numbers
authorChang S. Bae <chang.seok.bae@intel.com>
Thu, 21 Oct 2021 22:55:23 +0000 (15:55 -0700)
committerBorislav Petkov <bp@suse.de>
Tue, 26 Oct 2021 08:53:02 +0000 (10:53 +0200)
The kernel checks at boot time which features are available by walking a
XSAVE feature table which contains the CPUID feature bit numbers which need
to be checked whether a feature is available on a CPU or not. So far the
feature numbers have been linear, but AMX will create a gap which the
current code cannot handle.

Make the table entries explicitly indexed and adjust the loop code
accordingly to prepare for that.

No functional change.

Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Len Brown <len.brown@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20211021225527.10184-20-chang.seok.bae@intel.com
arch/x86/kernel/fpu/xstate.c

index db0bfc2..e3d1898 100644 (file)
@@ -53,18 +53,18 @@ static const char *xfeature_names[] =
        "unknown xstate feature"        ,
 };
 
-static short xsave_cpuid_features[] __initdata = {
-       X86_FEATURE_FPU,
-       X86_FEATURE_XMM,
-       X86_FEATURE_AVX,
-       X86_FEATURE_MPX,
-       X86_FEATURE_MPX,
-       X86_FEATURE_AVX512F,
-       X86_FEATURE_AVX512F,
-       X86_FEATURE_AVX512F,
-       X86_FEATURE_INTEL_PT,
-       X86_FEATURE_PKU,
-       X86_FEATURE_ENQCMD,
+static unsigned short xsave_cpuid_features[] __initdata = {
+       [XFEATURE_FP]                           = X86_FEATURE_FPU,
+       [XFEATURE_SSE]                          = X86_FEATURE_XMM,
+       [XFEATURE_YMM]                          = X86_FEATURE_AVX,
+       [XFEATURE_BNDREGS]                      = X86_FEATURE_MPX,
+       [XFEATURE_BNDCSR]                       = X86_FEATURE_MPX,
+       [XFEATURE_OPMASK]                       = X86_FEATURE_AVX512F,
+       [XFEATURE_ZMM_Hi256]                    = X86_FEATURE_AVX512F,
+       [XFEATURE_Hi16_ZMM]                     = X86_FEATURE_AVX512F,
+       [XFEATURE_PT_UNIMPLEMENTED_SO_FAR]      = X86_FEATURE_INTEL_PT,
+       [XFEATURE_PKRU]                         = X86_FEATURE_PKU,
+       [XFEATURE_PASID]                        = X86_FEATURE_ENQCMD,
 };
 
 static unsigned int xstate_offsets[XFEATURE_MAX] __ro_after_init =
@@ -809,7 +809,10 @@ void __init fpu__init_system_xstate(unsigned int legacy_size)
         * Clear XSAVE features that are disabled in the normal CPUID.
         */
        for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) {
-               if (!boot_cpu_has(xsave_cpuid_features[i]))
+               unsigned short cid = xsave_cpuid_features[i];
+
+               /* Careful: X86_FEATURE_FPU is 0! */
+               if ((i != XFEATURE_FP && !cid) || !boot_cpu_has(cid))
                        fpu_kernel_cfg.max_features &= ~BIT_ULL(i);
        }