Add test case for subcarry optimization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303525 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/subcarry.ll b/test/CodeGen/X86/subcarry.ll
new file mode 100644 (file)
index 0000000..d09cbb5
--- /dev/null
+++ b/test/CodeGen/X86/subcarry.ll
@@ -0,0 +1,61 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+
+%S = type { [4 x i64] }
+
+define %S @negate(%S* nocapture readonly %this) {
+; CHECK-LABEL: negate:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    movq (%rsi), %rax
+; CHECK-NEXT:    movq 8(%rsi), %rcx
+; CHECK-NEXT:    notq %rax
+; CHECK-NEXT:    addq $1, %rax
+; CHECK-NEXT:    notq %rcx
+; CHECK-NEXT:    adcq $0, %rcx
+; CHECK-NEXT:    movq 16(%rsi), %rdx
+; CHECK-NEXT:    notq %rdx
+; CHECK-NEXT:    adcq $0, %rdx
+; CHECK-NEXT:    movq 24(%rsi), %rsi
+; CHECK-NEXT:    notq %rsi
+; CHECK-NEXT:    adcq $0, %rsi
+; CHECK-NEXT:    movq %rax, (%rdi)
+; CHECK-NEXT:    movq %rcx, 8(%rdi)
+; CHECK-NEXT:    movq %rdx, 16(%rdi)
+; CHECK-NEXT:    movq %rsi, 24(%rdi)
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    retq
+entry:
+  %0 = getelementptr inbounds %S, %S* %this, i64 0, i32 0, i64 0
+  %1 = load i64, i64* %0, align 8
+  %2 = xor i64 %1, -1
+  %3 = zext i64 %2 to i128
+  %4 = add nuw nsw i128 %3, 1
+  %5 = trunc i128 %4 to i64
+  %6 = lshr i128 %4, 64
+  %7 = getelementptr inbounds %S, %S* %this, i64 0, i32 0, i64 1
+  %8 = load i64, i64* %7, align 8
+  %9 = xor i64 %8, -1
+  %10 = zext i64 %9 to i128
+  %11 = add nuw nsw i128 %6, %10
+  %12 = trunc i128 %11 to i64
+  %13 = lshr i128 %11, 64
+  %14 = getelementptr inbounds %S, %S* %this, i64 0, i32 0, i64 2
+  %15 = load i64, i64* %14, align 8
+  %16 = xor i64 %15, -1
+  %17 = zext i64 %16 to i128
+  %18 = add nuw nsw i128 %13, %17
+  %19 = lshr i128 %18, 64
+  %20 = trunc i128 %18 to i64
+  %21 = getelementptr inbounds %S, %S* %this, i64 0, i32 0, i64 3
+  %22 = load i64, i64* %21, align 8
+  %23 = xor i64 %22, -1
+  %24 = zext i64 %23 to i128
+  %25 = add nuw nsw i128 %19, %24
+  %26 = trunc i128 %25 to i64
+  %27 = insertvalue [4 x i64] undef, i64 %5, 0
+  %28 = insertvalue [4 x i64] %27, i64 %12, 1
+  %29 = insertvalue [4 x i64] %28, i64 %20, 2
+  %30 = insertvalue [4 x i64] %29, i64 %26, 3
+  %31 = insertvalue %S undef, [4 x i64] %30, 0
+  ret %S %31
+}