typedef struct DisasContext {
DisasContextBase base;
- TCGv_i32 zero;
target_ulong pc;
int mem_idx;
const ControlRegState *cr_state;
return instr.opx;
}
-static TCGv load_zero(DisasContext *dc)
+static TCGv load_gpr(DisasContext *dc, unsigned reg)
{
- if (!dc->zero) {
- dc->zero = tcg_const_i32(0);
- }
- return dc->zero;
-}
-
-static TCGv load_gpr(DisasContext *dc, uint8_t reg)
-{
- if (likely(reg != R_ZERO)) {
- return cpu_R[reg];
- } else {
- return load_zero(dc);
+ assert(reg < NUM_GP_REGS);
+ if (unlikely(reg == R_ZERO)) {
+ return tcg_constant_tl(0);
}
+ return cpu_R[reg];
}
static void t_gen_helper_raise_exception(DisasContext *dc,
uint32_t index)
{
- TCGv_i32 tmp = tcg_const_i32(index);
-
tcg_gen_movi_tl(cpu_pc, dc->pc);
- gen_helper_raise_exception(cpu_env, tmp);
- tcg_temp_free_i32(tmp);
+ gen_helper_raise_exception(cpu_env, tcg_constant_i32(index));
dc->base.is_jmp = DISAS_NORETURN;
}
return;
}
- dc->zero = NULL;
-
instr = &i_type_instructions[op];
instr->handler(dc, code, instr->flags);
-
- if (dc->zero) {
- tcg_temp_free(dc->zero);
- }
}
static void nios2_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)