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drm/i915: Add ERR_INT to gen7 error state
authorBen Widawsky <ben@bwidawsk.net>
Mon, 20 Aug 2012 23:15:13 +0000 (16:15 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 22 Aug 2012 16:05:54 +0000 (18:05 +0200)
ERR_INT can generate interrupts. However since most of the conditions seem
quite fatal the patch opts to simply report it in error state instead of
adding more complexity to the interrupt handler for little gain (the
bits are sticky anyway).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Antti Koskipaa <antti.koskipaa@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_reg.h

index 204c19a..d300393 100644 (file)
@@ -719,6 +719,9 @@ static int i915_error_state(struct seq_file *m, void *unused)
                seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
        }
 
+       if (INTEL_INFO(dev)->gen == 7)
+               seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
+
        for_each_ring(ring, dev_priv, i)
                i915_ring_error_state(m, dev, error, i);
 
index a2382a1..cbd3cd0 100644 (file)
@@ -196,6 +196,7 @@ struct drm_i915_error_state {
        u32 cpu_ring_head[I915_NUM_RINGS];
        u32 cpu_ring_tail[I915_NUM_RINGS];
        u32 error; /* gen6+ */
+       u32 err_int; /* gen7 */
        u32 instpm[I915_NUM_RINGS];
        u32 instps[I915_NUM_RINGS];
        u32 instdone1;
index 002dcee..3633029 100644 (file)
@@ -1210,6 +1210,9 @@ static void i915_capture_error_state(struct drm_device *dev)
                error->done_reg = I915_READ(DONE_REG);
        }
 
+       if (INTEL_INFO(dev)->gen == 7)
+               error->err_int = I915_READ(GEN7_ERR_INT);
+
        i915_gem_record_fences(dev, error);
        i915_gem_record_rings(dev, error);
 
index fd6a26a..a20885c 100644 (file)
 #define DMA_FADD_I8XX  0x020d0
 
 #define ERROR_GEN6     0x040a0
+#define GEN7_ERR_INT   0x44040
 
 /* GM45+ chicken bits -- debug workaround bits that may be required
  * for various sorts of correct behavior.  The top 16 bits of each are