arm_test_cc(&c32, cc);
- /* Sign-extend the 32-bit value so that the GE/LT comparisons work
- * properly. The NE/EQ comparisons are also fine with this choice. */
+ /*
+ * Sign-extend the 32-bit value so that the GE/LT comparisons work
+ * properly. The NE/EQ comparisons are also fine with this choice.
+ */
c64->cond = c32.cond;
c64->value = tcg_temp_new_i64();
tcg_gen_ext_i32_i64(c64->value, c32.value);
-
- arm_free_cc(&c32);
-}
-
-static void a64_free_cc(DisasCompare64 *c64)
-{
- tcg_temp_free_i64(c64->value);
}
static void gen_rebuild_hflags(DisasContext *s)
tcg_t0 = tcg_temp_new_i32();
arm_test_cc(&c, cond);
tcg_gen_setcondi_i32(tcg_invert_cond(c.cond), tcg_t0, c.value, 0);
- arm_free_cc(&c);
/* Load the arguments for the new comparison. */
if (is_imm) {
tcg_gen_movcond_i64(c.cond, tcg_rd, c.value, zero, t_true, t_false);
}
- a64_free_cc(&c);
-
if (!sf) {
tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
}
tcg_gen_movcond_i64(c.cond, t_true, c.value, tcg_constant_i64(0),
t_true, t_false);
tcg_temp_free_i64(t_false);
- a64_free_cc(&c);
/* Note that sregs & hregs write back zeros to the high bits,
and we've already done the zero-extension. */
cmp->value_global = global;
}
-void arm_free_cc(DisasCompare *cmp)
-{
- if (!cmp->value_global) {
- tcg_temp_free_i32(cmp->value);
- }
-}
-
void arm_jump_cc(DisasCompare *cmp, TCGLabel *label)
{
tcg_gen_brcondi_i32(cmp->cond, cmp->value, 0, label);
DisasCompare cmp;
arm_test_cc(&cmp, cc);
arm_jump_cc(&cmp, label);
- arm_free_cc(&cmp);
}
void gen_set_condexec(DisasContext *s)
arm_test_cc(&c, a->fcond);
tcg_gen_movcond_i32(c.cond, rn, c.value, zero, rn, rm);
- arm_free_cc(&c);
store_reg(s, a->rd, rn);
tcg_temp_free_i32(rm);
#endif
void arm_test_cc(DisasCompare *cmp, int cc);
-void arm_free_cc(DisasCompare *cmp);
void arm_jump_cc(DisasCompare *cmp, TCGLabel *label);
void arm_gen_test_cc(int cc, TCGLabel *label);
MemOp pow2_align(unsigned i);