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drm/i915: prefer 3-letter acronym for broadwell
authorLucas De Marchi <lucas.demarchi@intel.com>
Tue, 24 Dec 2019 08:40:10 +0000 (00:40 -0800)
committerLucas De Marchi <lucas.demarchi@intel.com>
Sat, 28 Dec 2019 21:38:06 +0000 (13:38 -0800)
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts broadwell to bdw where appropriate.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Jani Nikula <jani.nikula@linux.intel.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191224084012.24241-8-lucas.demarchi@intel.com
drivers/gpu/drm/i915/display/intel_fifo_underrun.c
drivers/gpu/drm/i915/gt/intel_workarounds.c
drivers/gpu/drm/i915/gvt/handlers.c
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/intel_device_info.c

index d6e0d0b..1f80f27 100644 (file)
@@ -180,8 +180,8 @@ static void ivybridge_set_fifo_underrun_reporting(struct drm_device *dev,
        }
 }
 
-static void broadwell_set_fifo_underrun_reporting(struct drm_device *dev,
-                                                 enum pipe pipe, bool enable)
+static void bdw_set_fifo_underrun_reporting(struct drm_device *dev,
+                                           enum pipe pipe, bool enable)
 {
        struct drm_i915_private *dev_priv = to_i915(dev);
 
@@ -268,7 +268,7 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
        else if (IS_GEN(dev_priv, 7))
                ivybridge_set_fifo_underrun_reporting(dev, pipe, enable, old);
        else if (INTEL_GEN(dev_priv) >= 8)
-               broadwell_set_fifo_underrun_reporting(dev, pipe, enable);
+               bdw_set_fifo_underrun_reporting(dev, pipe, enable);
 
        return old;
 }
index 195ccf7..4e292d4 100644 (file)
@@ -254,7 +254,7 @@ static void bdw_ctx_workarounds_init(struct intel_engine_cs *engine,
 
        /* WaDisableDopClockGating:bdw
         *
-        * Also see the related UCGTCL1 write in broadwell_init_clock_gating()
+        * Also see the related UCGTCL1 write in bdw_init_clock_gating()
         * to disable EUTC clock gating.
         */
        WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
index bb9fe6b..21af822 100644 (file)
@@ -2675,7 +2675,7 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
        return 0;
 }
 
-static int init_broadwell_mmio_info(struct intel_gvt *gvt)
+static int init_bdw_mmio_info(struct intel_gvt *gvt)
 {
        struct drm_i915_private *dev_priv = gvt->dev_priv;
        int ret;
@@ -3364,20 +3364,20 @@ int intel_gvt_setup_mmio_info(struct intel_gvt *gvt)
                goto err;
 
        if (IS_BROADWELL(dev_priv)) {
-               ret = init_broadwell_mmio_info(gvt);
+               ret = init_bdw_mmio_info(gvt);
                if (ret)
                        goto err;
        } else if (IS_SKYLAKE(dev_priv)
                || IS_KABYLAKE(dev_priv)
                || IS_COFFEELAKE(dev_priv)) {
-               ret = init_broadwell_mmio_info(gvt);
+               ret = init_bdw_mmio_info(gvt);
                if (ret)
                        goto err;
                ret = init_skl_mmio_info(gvt);
                if (ret)
                        goto err;
        } else if (IS_BROXTON(dev_priv)) {
-               ret = init_broadwell_mmio_info(gvt);
+               ret = init_bdw_mmio_info(gvt);
                if (ret)
                        goto err;
                ret = init_skl_mmio_info(gvt);
index db24c88..0ac98e3 100644 (file)
@@ -3819,8 +3819,8 @@ static void gen9_sseu_device_status(struct drm_i915_private *dev_priv,
 #undef SS_MAX
 }
 
-static void broadwell_sseu_device_status(struct drm_i915_private *dev_priv,
-                                        struct sseu_dev_info *sseu)
+static void bdw_sseu_device_status(struct drm_i915_private *dev_priv,
+                                  struct sseu_dev_info *sseu)
 {
        const struct intel_runtime_info *info = RUNTIME_INFO(dev_priv);
        u32 slice_info = I915_READ(GEN8_GT_SLICE_INFO);
@@ -3905,7 +3905,7 @@ static int i915_sseu_status(struct seq_file *m, void *unused)
                if (IS_CHERRYVIEW(dev_priv))
                        cherryview_sseu_device_status(dev_priv, &sseu);
                else if (IS_BROADWELL(dev_priv))
-                       broadwell_sseu_device_status(dev_priv, &sseu);
+                       bdw_sseu_device_status(dev_priv, &sseu);
                else if (IS_GEN(dev_priv, 9))
                        gen9_sseu_device_status(dev_priv, &sseu);
                else if (INTEL_GEN(dev_priv) >= 10)
index ca7a42e..d87c314 100644 (file)
@@ -519,7 +519,7 @@ static void gen9_sseu_info_init(struct drm_i915_private *dev_priv)
        }
 }
 
-static void broadwell_sseu_info_init(struct drm_i915_private *dev_priv)
+static void bdw_sseu_info_init(struct drm_i915_private *dev_priv)
 {
        struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        int s, ss;
@@ -1025,7 +1025,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
        else if (IS_CHERRYVIEW(dev_priv))
                cherryview_sseu_info_init(dev_priv);
        else if (IS_BROADWELL(dev_priv))
-               broadwell_sseu_info_init(dev_priv);
+               bdw_sseu_info_init(dev_priv);
        else if (IS_GEN(dev_priv, 9))
                gen9_sseu_info_init(dev_priv);
        else if (IS_GEN(dev_priv, 10))